USB superspeed peripherals Forum Discussions

Hello

About debugging CX3. The following IAR debugger is being considered.
https://www.iar.com/globalassets/2/i-jet-arm.jpn.pdf

Q1)

Is it possible to use "I-jet" debugger mentioned above?

Q2)

Regarding development, I am understanding that they will proceed with reference to the following documents.Is it correct?
https://www.cypress.com/file/363756/download

Best Regards

Arai

Is there a way to know what state IDs are assigned to mirror states in the FX3's GPIF2 state machine (the value returned by CyU3PGpifGetSMState)?

Hello,

I am interfacing an Omnivision image sensor (OV12895) with the CX3 bridge (superspeed isochronous endpoint). The main problem I am facing is that frames are, on occasion, lost  (0x47 returned by CyU3PDmaMultiChannelCommitBuffer). After some researches and tests it looks like this kind of errors are likely to be due to host not retreiving data fast enough from the endpoint. Still I am wondering whether there could be a problem with the various throughputs in the chain (from image sensor to endpoint) not matching each other.

Alongside this issue some questions pops in my mind :

• If the MIPI receives more data than GFIP can cope with, would it be possible to have this 0x47 (on CyU3PDmaMultiChannelCommitBuffer, in the GPIF thread callback) ?

• What would be the impact of setting CX3_FIFO_CTRL register (actually fifoDelay member of CyU3PMipicsiCfg_t) to 1 ?

Or rather, would there be an interest in not setting it to 1 (e.g. example 0x100) ?

Concerning performances, are there other values for this register that could enable to take advantage of some (intrinsics?) mechanisms regarding DMA for example (word access, burst, ...) ?

• Regarding memory storage and padding constraints in the MIPI receiver. In the CSI-2 specification (see chapter 12)

The CSI-2 data protocol requires certain behavior from the receiver connected to the CSI transmitter. The following sections describe how different data formats should be stored inside the receiver. While informative, this section is provided to ease application software development by suggesting a common data storage format among different receivers.

What about the CX3 one ? Could there be other/extra constraints that could entail some padding ?

• Last point : how is reacting the CX3 MIPI receiver if ever the amount of data indeed received through CSI lanes is less/greater than the value in CX3_BYTE_COUNT ?

Regards

I want to configure GPIO20,to output High or Low level,but CyU3PDeviceConfigureIOMatrix return a CY_U3P_ERROR_BAD_ARGUMENT error code.

I don't know why, Does not GPIO20 is not a general purpose IO?

Hi all,

Hi have an sensor running at 30fps with 1828*998 resolutions connected to CX3 on Mipi and sending RAW12 data. I configure GPIF to transform RAw12 data  in 16 bits.

I am using USB block as CY_USB_BULK_STREAMING_ENDPOINT_OUT and my DMA SIZE is 24576 with 4 buffer.

To avoid Images corruption I reset DMA everytime CyU3PDmaMultiChannelCommitBuffer Function returning  CY_U3P_ERROR_INVALID_SEQUENCE (0x47).

Most of the time my PC received the Image at 30 fps but every 40sec/2min(not periodic)  I loose 4 to 10 Images but I can't loose Images for my algorithm.

I try to increase DMA SIZE (36000 with 3 buffer) but the problem is still present

Thanks,

Max

Hi,

Can someone confirm if discharge diode is required for the reset pin of CX3 or FX3

Thanks,

Menaka

I’m trying to add audio control features to my FX3 based UVC system to control volume and mute. My system currently supports audio but does not have any audio descriptor to control volume and mute options. I’m modifying the descriptor to support that, however I don’t see a way in API document to get and audio events.

Does anyone know how to handle audio set up commands?

Hi,

I am working on SD_card write operation, we want to write data to SD card, the data which is considered by the 512bytes in firmware and the data is not copying to the buffer.

static void

CyFxBulkSrcSinkFillInBuffers (

        void)

{

    CyU3PReturnStatus_t stat;

    CyU3PDmaBuffer_t    buf_p;

    uint16_t            index = 0;

    CyU3PDmaCbType_t  type;

    /* Now preload all buffers in the MANUAL_OUT pipe with the required data. */

    for (index = 0; index <50; index++)

    {

        stat = CyU3PDmaChannelGetBuffer (&glChHandleBulkSrc, &buf_p, CYU3P_NO_WAIT);

        for(i=0;i<=512;i++)

        {

        buf_p.buffer=READBUFFER;

        }

        if (type == CY_U3P_DMA_CB_XFER_CPLT)

        {

        if (stat != CY_U3P_SUCCESS)

        {

        stat= CyU3PSibReadWriteRequest(0, 0,

              4, 2, 0, 0);

        }

        }

      //  CyU3PMemSet (buf_p.buffer, CY_FX_BULKSRCSINK_PATTERN, buf_p.size);

        stat = CyU3PDmaChannelCommitBuffer (&glChHandleBulkSrc,512, 0);

    }

Creating the DMA channel i.e CPU to Socket 0.

Please find the below attachment.

Regards,

Dhanuja