USB superspeed peripherals Forum Discussions
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Hi,
I am developing a product with Fx3s. And would like to use the GPIF II interface to interact with an FPGA.
As the first step, I used two Fx3s and one acted as the master and the other as the slave.
My question is: how to compute the number of clocks needed to read from and write to the slave side?
The following experiment were done with the default source code of AN87216 with the only change to modify the data bus width from 32 to 16.
1. Fx3 master read from fx3 slave (8bytes sent from slave out endpoint in control center)
RD_ signal last for 8 clock cycles (I think it should be 4 if bus bit width is 16 ???)
2. Fx3 master write to fx3 slave (8bytes sent from master out endpoint in control center)
WR_ signal last for 6 clock cycles (I think it should be 4 if bus bit width is 16 ???)
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Hi, I have an AR0233 streaming 1920x1080p60 in RAW12 format.
I can see the MIPI receiver is capturing data, but the frame size is inconsistent, and there're no data coming through UVC to host.
I've tested with different PHY time delay (0x0A ~ 0x0F), the receiving frame size is not consistent for these tests as well.
The Frm_Sz should be 1920 * 1080 * 12 / 8 = 3110400 B
UART debug message:
Prod = 82 Cons = 81 Prtl_Sz = 16144 Frm_Cnt = 53 Frm_Sz = 3035056 B
TimeDiff = -1 ms FPS = 0
0 0 0 0 0 0 0 0 0
Prod = 82 Cons = 81 Prtl_Sz = 12864 Frm_Cnt = 203 Frm_Sz = 3031776 B
TimeDiff = -2 ms FPS = 0
0 0 0 0 0 0 0 0 0
Prod = 82 Cons = 81 Prtl_Sz = 15904 Frm_Cnt = 353 Frm_Sz = 3034816 B
TimeDiff = -2 ms FPS = 0
0 0 0 0 0 0 0 0 0
Prod = 82 Cons = 81 Prtl_Sz = 11776 Frm_Cnt = 503 Frm_Sz = 3030688 B
TimeDiff = -1 ms FPS = 0
0 0 0 0 0 0 0 0 0
Prod = 81 Cons = 81 Prtl_Sz = 30704 Frm_Cnt = 558 Frm_Sz = 3012800 B
TimeDiff = -1 ms FPS = 0
0 0 0 0 0 0 0 0 0
The sensor setting I use:
/* AR0233_RAW12_1080p : */
CyU3PMipicsiCfg_t AR0233_RAW12_1080p =
{
CY_U3P_CSI_DF_RAW12, /* CyU3PMipicsiDataFormat_t dataFormat */
4, /* uint8_t numDataLanes */
1, /* uint8_t pllPrd */
79, /* uint16_t pllFbd */
CY_U3P_CSI_PLL_FRS_250_500M, /* CyU3PMipicsiPllClkFrs_t pllFrs */
CY_U3P_CSI_PLL_CLK_DIV_4, /* CyU3PMipicsiPllClkDiv_t csiRxClkDiv */
CY_U3P_CSI_PLL_CLK_DIV_4, /* CyU3PMipicsiPllClkDiv_t parClkDiv */
0, /* uint16_t mClkCtl */
CY_U3P_CSI_PLL_CLK_DIV_2, /* CyU3PMipicsiPllClkDiv_t mClkRefDiv */
1920, /* uint16_t hResolution */
0 /* uint16_t fifoDelay */
};
/* GUID, globally unique identifier used to identify streaming-encoding format*/
0X55,0X59,0X56,0X59,
0X00,0X00,0X10,0X00,
0X80,0X00,0X00,0XAA,
0X00,0X38,0X9B,0X71,
0x10, /* Number of bits per pixel: 16*/
0x01, /* Optimum Frame Index for this stream: 1 (1080p) */
0x00, /* X dimension of the picture aspect ratio; Non-interlaced */
0x00, /* Y dimension of the pictuer aspect ratio: Non-interlaced */
0x00, /* Interlace Flags: Progressive scanning, no interlace */
0x00, /* duplication of the video stream restriction: 0 - no restriction */
/* Class specific Uncompressed VS Frame Descriptor 1 - 1080p */
0x1E, /* Descriptor size */
CX3_CS_INTRFC_DESCR, /* Descriptor type*/
0x05, /* Subtype: frame interface*/
0x01, /* Frame Descriptor Index: 1 */
0x00, /* No Still image capture method supported */
0x80,0x07, /* Width in pixel: 1920 */
0x38,0x04, /* Height in pixel: 1080 */
0x00,0x80,0xc6,0x13, /* Min bit rate (bits/s): 1920 x 1080 x No Of Bits per Pixel x FrameRate = 331776000 */
0x00,0x80,0xc6,0x13, /* Max bit rate (bits/s): Fixed rate so same as Min */
0x00,0x48,0x3f,0x00, /* Maximum video or still frame size in bytes(Deprecated): 1920 x 1080 x 2 */
0x40,0x42,0x0f,0x00, /* Default frame interval (in 100ns units): (1/30)x10^7 */
0x01, /* Frame interval type : No of discrete intervals */
0x40,0x42,0x0f,0x00, /* Frame interval 3: Same as Default frame interval */
/* Endpoint Descriptor for BULK Streaming Video Data */
0x07, /* Descriptor size */
CY_U3P_USB_ENDPNT_DESCR, /* Endpoint Descriptor Type */
CX3_EP_BULK_VIDEO, /* Endpoint address and description: EP 3 IN */
CY_U3P_USB_EP_BULK, /* BULK End point */
CX3_EP_BULK_VIDEO_PKT_SIZE_L, /* CX3_EP_BULK_VIDEO_PKT_SIZE_L */
CX3_EP_BULK_VIDEO_PKT_SIZE_H, /* CX3_EP_BULK_VIDEO_PKT_SIZE_H */
0x00, /* Servicing interval for data transfers */
/* Super Speed Endpoint Companion Descriptor */
0x06, /* Descriptor size */
CY_U3P_SS_EP_COMPN_DESCR, /* SS Endpoint Companion Descriptor Type */
0x0F, /* Max number of packets per burst: 12 */
0x00, /* Attribute: Streams not defined */
0x00, /* No meaning for bulk */
0x00
};
/* UVC Probe Control Settings */
uint8_t glProbeCtrl[CX3_UVC_MAX_PROBE_SETTING] = {
0x00, 0x00, /* bmHint : No fixed parameters */
0x01, /* Use 1st Video format index */
0x01, /* Use 1st Video frame index */
0x0A, 0x8B, 0x02, 0x00, /* Desired frame interval in 100ns */
0x00, 0x00, /* Key frame rate in key frame/video frame units */
0x00, 0x00, /* PFrame rate in PFrame / key frame units */
0x00, 0x00, /* Compression quality control */
0x00, 0x00, /* Window size for average bit rate */
0x00, 0x00, /* Internal video streaming i/f latency in ms */
0x00, 0x48, 0x3F, 0x00, /* Max video frame size in bytes */
#ifdef CX3_UVC_1_0_SUPPORT
0x00, 0x90, 0x00, 0x00 /* No. of bytes device can rx in single payload: 32KB */
#else
/* UVC 1.1 Probe Control has additional fields from UVC 1.0 */
0x00, 0x90, 0x00, 0x00, /* No. of bytes device can rx in single payload: 32KB */
0x00, 0x60, 0xE3, 0x16, /* Device Clock */
0x00, /* Framing Information - Ignored for uncompressed format*/
0x00, /* Preferred payload format version */
0x00, /* Minimum payload format version */
0x00 /* Maximum payload format version */
#endif
};
Show LessQuestion 2: How to configure external FLASH for FX3/CX3 (CYUSB3065)
I use (CYUSB3065) here, and then hang an 8MB FLASH outside the chip. At present, it's no problem to start the burning, but when I modify the space configuration, it can't be realized and it can't start when burning in.
The content of the revision includes two aspects:
1. Compiled configuration files: C: Program Files (x86) Cypress EZ-USB FX3 SDK 1.3 firmware/common/fx3.ld
Before amendment, it read as follows:
I-TCM: ORIGIN = 0x100 LENGTH = 0x3F00 SYS_MEM: ORIGIN = 0x40003000 LENGTH = 0x2D000 DATA: ORIGIN = 0x40030000 LENGTH = 0x8000
Amended as follows:
I-TCM: ORIGIN = 0x100 LENGTH = 0x3F00 SYS_MEM: ORIGIN = 0x40003000 LENGTH = 0x2E000 DATA: ORIGIN = 0x40031000 LENGTH = 0x8000
2. cyxtx.c
Before modification: define CY_U3P_MEM_HEAP_BASE ((uint8_t*) 0x40038000)
After modification: define CY_U3P_MEM_HEAP_BASE ((uint8_t*) 0x40039000)
Excuse me: How can we use external FLASH to store code so that the size of code is not limited by space?
Show LessHi,
I'm going through this document:
AN65974 Designing with the EZ-USB® FX3 Slave FIFO Interface.pdf
It mentions that you have to enable statements on pages 43-44...like:
"The DMA channels previously mentioned are set up if the following define is enabled in the cyfxslfifosync.h file in the FX3 firmware project provided with this application note. /* set up DMA channel for stream IN/OUT transfers"
#define STREAM_IN_OUT
The file cyfxslfifosync.h in my FIFOexamples folder does not containt these lines.
What is going on?
I'm on SDK 1.3
thanks
Show LessHi technical support team,
I'm developing cx3 firmware in-application upgrade function.But now blocked by one issue. Please help me to figure it out.
Please find my operation steps as below:
step 1 runs good.
Set Pmode Pin to run ROMboot. It runs usbboot and ControlCenter recognized it as bootloader. And I update the 2-stage bootloader to SPI FLASH directly.
step 2: still fine.
Set Pmode Pin to user mode and select SPI boot options. And the 2-stage bootloader(original from V1.3.4 SDK) runs successfully, cause it has been recognized as USBStreamer Example by the ControlCenter. It seems good till now.
step 3: seems FAIL.
Use Control Center to download my application image to SPI flash. But after i chose my app.img, the ControlCenter shows SPI flash erase fail and upgrade blocked.
Isn't it a little strange here? From my point of view, no matter bootROM or 2-stage bootloader is used, the ControlCenter will download the bootProgrammer image to CX3's RAM through the usbboot channel. And the downloaded bootProgrammer in RAM will executes the SPI FLASH erase/write/read operations. But now, the same image achieves the different results.
Question 1: How would this happen? Is there any checksum not match when using different bootloader? How to resolve this problem?
Question 2: I found bootProgrammer .img located at the same routine with ControlCenter.exe. Is this image same with the sample FlashProg project in v1.3.4 SDK?
BTW, I have read the FailSafe bootloader doc, and the image merge tool seems good. But what if I change the APPs' location in FLASH, does it still suitable? I haven't found the source code published. So, I have to use the 2-stage bootloader companion with ControlCenter.exe to upgrade my first APP, and then the APP upgrade the following APP...
Show LessCyU3PMipicsiGetErrors (CyTrue, &errCnts);
CyU3PDebugPrint ("mipi err:frmErrCnt=%x,crcErrCnt=%x,mdlErrCnt=%x,ctlErrCnt=%x,eidErrCnt=%x,recrErrCnt=%x,unrcErrCnt=%x,recSyncErrCnt=%x,unrSyncErrCnt=%x\r\n",
errCnts.frmErrCnt,errCnts.crcErrCnt,errCnts.mdlErrCnt,errCnts.ctlErrCnt,
errCnts.eidErrCnt,errCnts.recrErrCnt,errCnts.unrcErrCnt,errCnts.recSyncErrCnt,errCnts.unrSyncErrCnt);
the print is :
mipierr:frmErrCnt=0,crcErrCnt=0,mdlErrCnt=4003D50C,ctlErrCnt=4000794C,eidErrCnt=4000A778,recrErrCnt=0,unrcErrCnt=0,recSyncErrCnt=0,unrSyncErrCnt=0
you see some format is print error,and the print format sometimes is print ok, some times error.
How to slove it?
Show Lesswhen I use potlayer to open cx3_uvc, the uvc device will commit camera data from DMA to UVC, use the api CyU3PDmaMultiChannelCommitBuffer,
and it will commit success 6 times,then it will stop.
the usb log catpured by wireshark is attachment,
what's wrong with it?
Show LessI use cx3 on ARM(RK3399 Ubuntu), the sensor is ov9282, 1280x800 @ 15fps, it always block in a minutes(about 30 minutes), there is no error, but can't get any frame data. The log is as below. "commit_num" is added by myself, to count the times of data commit to usb endpoint. When it is block, there is no error, and the "commit_num" also not update.
But on PC, also Ubuntu OS, it always ok.
Is there anyone have this issue, and give me spme suggestion?
UsbCB:Call AppStop CyCx3AppThread_Entry
AplnStop:SMState = 0x7
AplnStrt:CyCx3AppStart CyCx3AppStart
AplnStrt:SMState = 0x1
Prod = 83 Cons = 83 Prtl_Sz = 9520 Frm_Cnt = 308 Frm_Sz = 2048000 B
TimeDiff = -39 ms FPS = 0
UsbCB:Call AppStop CyCx3AppThread_Entry
AplnStop:SMState = 0x7
AplnStrt:CyCx3AppStart CyCx3AppStart
AplnStrt:SMState = 0x1
Prod = 83 Cons = 90 Prtl_Sz = 9520 Frm_Cnt = 309 Frm_Sz = 2048000 B
UsbCB:Call AppStop CyCx3AppThread_Entry
AplnStop:SMState = 0xA
AplnStrt:CyCx3AppStart CyCx3AppStart
AplnStrt:SMState = 0x2
UsbCB:Call AppStop CyCx3AppThread_Entry
AplnStop:SMState = 0x2
AplnStrt:CyCx3AppStart CyCx3AppStart
AplnStrt:SMState = 0x2
Prod = 62 Cons = 62 Prtl_Sz = 9520 Frm_Cnt = 310 Frm_Sz = 1532240 B
[CyCx3AppMipiErrorThread] commit_num = 26400
[CyCx3AppMipiErrorThread] commit_num = 32624
[CyCx3AppMipiErrorThread] commit_num = 38804
[CyCx3AppMipiErrorThread] commit_num = 39222
[CyCx3AppMipiErrorThread] commit_num = 39222
[CyCx3AppMipiErrorThread] commit_num = 39222
[CyCx3AppMipiErrorThread] commit_num = 39222
[CyCx3AppMipiErrorThread] commit_num = 39222
[CyCx3AppMipiErrorThread] commit_num = 39222
[CyCx3AppMipiErrorThread] commit_num = 39222
[CyCx3AppMipiErrorThread] commit_num = 39222
[CyCx3AppMipiErrorThread] commit_num = 39222
[CyCx3AppMipiErrorThread] commit_num = 39222
[CyCx3AppMipiErrorThread] commit_num = 39222
[CyCx3AppMipiErrorThread] commit_num = 39222
[CyCx3AppMipiErrorThread] commit_num = 39222
[CyCx3AppMipiErrorThread] commit_num = 39222
Show LessHi everyone.
I'm using CX3 to transfer image data to Jetson Xavier board through USB port.
I'm using cyusb_bulk_transfer function and there is a problem of timeout.
When I check the packet transfer time, each packet tranfer usually takes 300 us but sometimes it takes 280000 us.
It causes severe frame drops of my system.
Is this due to CPU resources or an intrinsic problem of bulk data transfer?
Thank you in advance.
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