I'm working with CX3 conencted to the sensor which streams RAW8 data at 2592x920@30fps. My goal is to make this work with Android phones which support superspeed USB. (Galaxy S series, for example)
After lots of trials and errors, I manage to make it work with a few Android phone such as Galaxy20.
The problem I have been struggling to solve is that it doesn't work well with all superspeed supporting Android phone. As I tested on Galaxy S9 and S10 (both phones also supports Superspeed), the streaming stops with CB_Failure after a few frames. USB versions on each phone may not be identical, but I confirmed that all phones above meets 5Gbps at least.
I have read all articles talking about CB_failure and tried the recommended modification, but didn't work for my case.
Does it possibly happen that UVC camera operates diffrently depending on devices? Could anyone give me advice or suggestion to try? I have been stuck in this problem without progress for long time.
Thnaks in advance.
I am using SONY IMX294 sensor and I don't know how to set H-Blanking and V-Blanking, I can get some information from IMX294 datasheet,can you help me to determine the value of H-Blanking and V-Blanking
datasheet Readout mode NO.6
My sensor configuration parameters
The datasheet only gives this information.
UVC based application for FX3 is created based on the framework of AN75779. 24bit GPIF is used(D23:D0) . image is 800*600. Pixel depth is 24bit/pixel, i.e. 3Byte/pixel. Since it is 24bits/pixel raw image, GUID for RGB888 is used for media type and RGB888 will be debayered in host. DMA buffer keeps the same: 16kB, 4 counts, 2 sockets. Only change the GPIF bus to 24bits, LD_DATA_COUNT, LD_ADDR_COUNT to 5455. However, it can't stream.
But according to KBA226722,
S= 800*600*3= 1,440,000 byte,
F= int(S/(16384-16))= 1440000/16368 = 87
P= fraction of S/(16384-16) * 16368 = 0.976594*16368 = 15984
It should be working.
I noticed that in KBA226722 , it mentioned in item 5 "If exact line data (i.e nothing is appended at the end of the line data) is intended to be sent to the Host, then make sure that line size in bytes is divisible by GPIF bus width (in bytes)." I don't quite get this point.
Help is needed on the proper setting of DMA configuration and GPIF state machine data and address count value.
Thanks in advance
We purchased three Denebola RDK and after testing them, we are ready to make the next step and design our own board. Because of the complexity of the circuit, we are following closely the schematics of the Denebola RDK. However, it would really help us to have a reference design of the board (layout and routing). Unfortunately, I am unable to find it for the Denebola RDK. Where can I find a reference design including board layout and routing, either for Denebola RDK or similar board?
Thank you.Show Less
This is a continuation of an issue from: FX3 emmc unreachable after format in manual
The FX3 does not allow the drive to be formatted when set to manual, this is a big issue since we want to encrypt data as it is passed through. The drive becomes unrecognizable after this process, after trying it once, failing, then trying again, the drive does appear as "raw" in device manager, but it is still not format-able. Is there an additional call back that must be added? Please note when firmware is written and the drive is formatted under auto, then reset back to manual, files can be written and read like normal, it is just when trying to format the drive in manual that this fails.
I apologize I can't seem to post a reply to the previous thread so creating a new one. I have tested this on a different FX3 with a different flash chip and the issue persists. Please see the attached project file which is a very slightly modified version of the MSC example and these videos, to find the places where changes were made in the zip, search for the define "Manual_MSC". It is used in 3 places.
Video of failure to format to FAT with explorer, succeeding when switched back to auto mode, then failing again when trying to format in NTFS, and explorer crashed at the end too...
Video of formatting drive with device manager, FX3 just stopped working at the end, it was still connected.
I have also tried other formatting tools and this still fails.
Is there a call back that is missing in: CyFxMscApplnDmaCb? Or is there a response that is meant to be added to CyFxMscApplnUSBSetupCB?
I have built a UVC project and observed with an oscilloscope that the sensor can output the correct clock and data signals, but I can't receive any image data on the PC side with a USB hount.
I just implemented UART debugging and when I download the .img file to my hardware, I can observe that the UART can print the configuration information of the sensor, but the video streaming information and the MIPI error information I want to observe will not be printed.
I would like to know why this is happening, it seems to be gone after the sensor configuration is done. How can I find out where the error occurred?
My CX3 does not have the MIPI output interface for signal analysis, so I can only observe the output of the sensor.
We are developing a custom module that features MIPI 2lane, 960 Mbps/lane.
The module has "Embedded Line Data" so we are able to recognize whether the stream is successive or not.
We can get an index for each image and the index should be one of 0, 1, 2, and 3.
However, we only can get images that contain an index of 0 or 2. as below.
Previously, we posted a thread on how to check the DMA buffer to check the image index as below.
We tried to apply the advice from the above thread but it didn't work.
When we applied it, the image flows like below.
Also, the log didn't print out as I expected.
Actually, I want to check the index information, but it was not possible.
So I tested whether it is possible to retrieve data as below.
First, we copied the buffer count to the temp variable that is "ptr_buf_count".
Second, print copied count value.
However, the count value is "0" and even "CB failure" log appears. (Originally, it didn't appear.)
Also, when the image flows, the "Embedded Data Line" is totally abnormal.
(Phase should be one of 0, 1, 2, and 3 / MicroFrame should be 100)
we want to verify that we can receive a successive image.
When we are using the FX3 in development everything works fine.
We have questions on switching over to our own VID/PID once we obtain a VID from USB-IF.
Currently we must program the FX3 with our APP image by using Cypress GUI “cyusb_linux” every time we power-up.
I see in the Cypress Library the routine to call that will do same and program our APP image into Fx3. But it doesn’t work.
Think won’t even compile? Once we program the efuse and have our won VID we will need to be able to program the FX3
By calling the library routine and not using the GUI cysb_linux, how do we do that?
When have own VID, does it get just programmed in when we load our own APP image?
What do we need to program the efuse? Can we do that with FX3 installed on our boards?
Do we need anything else to use the chip and ship it in systems?Show Less
When I'm trying to write data to Fx3 device from a FPGA device, I always get zero-lengh data transfer despite buffer being full (I know it is full base on the state of DMA flags). I noticed strange behavior of my RDY signal in a middle of a transfer it goes low for some reason and after few clock cycles it goes high (as it should be)
In attachment i'm sending you firmware which I use and state machine from GPIF designer
I'm Rohanth working in HTIC I'm using ECXRK5064 board. While trying to program this it not detected in my system . when I check this if found some error in driver says "(Code 48)" I don't know what it is. kindly someone reply what it is and how to solve.
Thankyou & Regards,