USB superspeed peripherals Forum Discussions
Hi, I'm new to learn how USB works. So i bought SuperSpeed Explorer kit recently. It's my fault that i didn't RTFM well. But i need some help.
1. First, I want to connect 8-bit SRAM that i have. Here's what i did
I used this 8-bit SRAM. Here's reference doc and you can check this in detail.
https://pdf1.alldatasheet.com/datasheet-pdf/view/127524/HITACHI/HM6264ALP-10.html
I connected DQ(0 ~ 7) to I/O(1~8), DQ(8 ~ 15) to A (1 ~ 8).
Also i connected CTL0(DQ17) to !CS, CTL1(DQ18) to !WE, CTL2(DQ19) to !OE. J5 was disabled ofc.
And i fixed 32bit address to 8bit address via GPIF II Designer. This project is basically contained in "SRAM-FX3" Example, so i just fixed only that one. after that, i generated config header, Re-Built "SRAM-FX3" Firmware Example.
This was i got. I followed SRAM Example based on manual, but i couldn't figure out what is wrong.
Please let me know what i've missed.
2. As far as i understand, Transition Equation between state slots from State Machine could change GPIOs' state.
but i don't understand how it works. Comment said,
=================================
The fromState parameter can be used to ensure that the transition to toState
happens only when the state machine is in a well defined idle state. If a
valid state id (0 - 255) is passed as the fromState, the transition is only
allowed from that state index. If not, the state machine is immediately
switched to the toState.
=================================
"Valid state" should be in 0 ~ 255, but why did they use 256 in CyU3PGpifSMSwitch?
and it seems this sentence tells me that i'm wrong. does anyone explain this in detail? I'm really confused.
Many thanks.
Show LessDear Sirs,
Attached is part of my FX3 state machine when doing READing Data and the interface timing I suppose FX3 would be.
State machine will go from READ state to RD_WAIT state triggered by rfifo_empty(from external device:FPGA).
my question is :
If I just want to read 4 times, but state machine will go to RD_WAIT(slcs/slrd/sloe==HIGH) after it samples rfifo_empty==HIGH at positive edge of PCLK. If the interface timing is like what I draw, there will exist 5 read transfers.
How to avoid this situation? (Or maybe my assumption about interface timing is not correct)
Best regards,
james
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Hello,
I would like to put the XRST pin in high with the following function: CyU3PMipicsiSetSensorControl (CY_U3P_CSI_IO_XRES, CyTrue); but when I call any function that contains Mipi I get the following error:
c:/program files (x86)/cypress/ez-usb fx3 sdk/1.3/arm gcc/bin/../lib/gcc/arm-none-eabi/4.8.1/../../../../arm-none-eabi/bin/ld.exe: final link failed: Bad value
Does anyone have any idea why? thank you
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Dear sir,
When I was learning and using the CYAPI library, I found a problem.
About BeginDataXfer and FinishDataXfer. In these 2 functions, they all need a buffer paramemter.
So I checked the source code. In BeginDataXfer function, the buffer will be memcpy into pXmitBuf.
And in FinishDataXfer, the buffer will be memcpy out from pXmitBuf.
So why do we need such a weird repetitive operation?
Thanks
Chad
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Hi,
I am actually working with 13MPx CMOS Image Sensor. this sensor has 10 bits accuracy in his dynamic range. So, for this reason has the possibility to sending both 8 bits per pixel either 10 bits per pixel (using full dynamic range).
As I am currently working with the CX3, using RGB888 as data input and 24 bits size as data output. I have to use The the 8 bits per pixel profile from the sensor,knowing that I am lossing accuracy which is esential in order to quantize the analog value.
So, I have the following question: Is it possible to send 10 bits per pixel from the sensor, using a CX3's configuration based on RGB888 as data input and holding the same output size of 24 bits?. Because if I do it, we will not have to do zero padding as with the RAW10 format. (Please, see the attached picture).
What code sections will have to change in order to get this profile?.
Thanks so much.
Show LessHello,
I'm trying to develop a custom module.
The module has embedded data but I cannot receive the data that I expected.
In order to check EMB data, I modified a BulkLoop example to print some logs as below.
I expected "Phase Idx" 0, 1, 2, and 3 should be repeated but they didn't.
At first, I thought I'm able to use "CyU3PDebugPrint()" function.
However when I added that function to DMA callback function which names CyCx3UvcAppDmaCallback(), the firmware didn't work.
I want to check the DMA buffer to make sure that the firmware is no problem.
In this case, how can I access the DMA buffer to check values?
or Is there any way to check the EMB data?
Thank you.
Show LessHello,
We want to use CyU3PMipicsiSetSensorControl(CY_U3P_CSI_IO_XRES,CyTrue); in the BootLedBlink example main.c line 83.
We attached also the source code .The result when compile is:
*** Incremental Build of configuration Debug for project BootLedBlink ****
cs-make all
'Building target: BootLedBlink.elf'
'Invoking: Cross ARM C Linker'
arm-none-eabi-gcc -mcpu=arm926ej-s -marm -mthumb-interwork -O0 -fmessage-length=0 -fsigned-char -ffunction-sections -fdata-sections -Wall -g3 -T "C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\/fw_build/boot_fw/cyfx3.ld" -nostartfiles -Xlinker --gc-sections -L"C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\/boot_lib/1_3_3/lib" -L"C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\/fw_lib/1_3_3/fx3_debug" -L"C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\ARM GCC\/lib/gcc/arm-none-eabi/4.8.1" -L"C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\ARM GCC\/arm-none-eabi/lib" -Wl,-Map,"BootLedBlink.map" -Wl,-d -Wl,-elf -Wl,--no-wchar-size-warning -Wl,--entry,Reset_Handler -o "BootLedBlink.elf" ./I2C.o ./cyfx_gcc_startup.o ./main.o -lcyfx3boot -lcyu3mipicsi -lc -lgcc
C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\/fw_lib/1_3_3/fx3_debug\libcyu3mipicsi.a(cyu3mipicsi.o): In function `CyU3PMipicsiRegisterRead':
cyu3mipicsi.c:(i.CyU3PMipicsiRegisterRead+0x54): undefined reference to `CyU3PI2cReceiveBytes'
cyu3mipicsi.c:(i.CyU3PMipicsiRegisterRead+0x68): undefined reference to `_tx_thread_sleep'
C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\/fw_lib/1_3_3/fx3_debug\libcyu3mipicsi.a(cyu3mipicsi.o): In function `CyU3PMipicsiRegisterWrite':
cyu3mipicsi.c:(i.CyU3PMipicsiRegisterWrite+0x50): undefined reference to `CyU3PI2cTransmitBytes'
cyu3mipicsi.c:(i.CyU3PMipicsiRegisterWrite+0x64): undefined reference to `_tx_thread_sleep'
C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\/fw_lib/1_3_3/fx3_debug\libcyu3mipicsi.a(cyu3mipicsi.o): In function `CyU3PMipicsiSetSensorControl':
cyu3mipicsi.c:(i.CyU3PMipicsiSetSensorControl+0xbc): undefined reference to `_tx_thread_sleep'
c:/program files (x86)/cypress/ez-usb fx3 sdk/1.3/arm gcc/bin/../lib/gcc/arm-none-eabi/4.8.1/../../../../arm-none-eabi/bin/ld.exe: BootLedBlink.elf: hidden symbol `CyU3PI2cReceiveBytes' isn't defined
c:/program files (x86)/cypress/ez-usb fx3 sdk/1.3/arm gcc/bin/../lib/gcc/arm-none-eabi/4.8.1/../../../../arm-none-eabi/bin/ld.exe: final link failed: Bad value
collect2.exe: error: ld returned 1 exit status
cs-make: *** [BootLedBlink.elf] Error 1
12:55:48 Build Finished (took 2s.213ms)
How can we use this function in bootledblink example?What do we have to include or to configure?
Thanks in advance!
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Hi,
We use FPGA+CYUSB3014 for image capture and the register of camera are controlled by IIC port of CYUSB3014.
Recently we found that the speed of IIC is much lower in WIN 10 system than in WIN 7 system. Maybe more than ten times.
Any experience for this problem, please tell me the reason.
Thanks
Show LessHello,
I am interested in using the Cypress FX3 as a mechanism to communicate with our FPGA. I basically need a method for two communication platforms:
1. FPGA will stream data out to an ARM processor connected via USB (through the Cypress FX3)
2. ARM processor needs to be able to read some registers (BRAM) on the FPGA through the same USB link and be able to set some registers (BRAM) to dictate what the FPGA will stream out.
I am following the information in the document AN65974 - Designing with the EZ-USB® FX3™ Slave FIFO Interface (cypress.com) and I can see that there is a pathway for me to do #1. The "FX3 Slave interface" described in an example like below seems to be a way of me to transfer data out of the FPGA using the "EP1_IN" interface.
However, what I am wondering is how to implement #2 - it is certainly possible to do it via some sort of opcode based protocol using EP1_OUT but what I risk doing in that respect is now data in EP1_IN is containing different streams of input data sources that need to be multiplexed in the USB Host (the ARM Core).
Is there perhaps a more elegant solution to do what I am describing? I saw that there is capability for an I2C and SPI interface on the FX3, but I am not too sure what this refers to. Does this appear like a SPI or I2C interface to the FPGA? Something like that could work - so the I2C/SPI interface is used as my #2 requirement.
Thanks for the help!
Prateek
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