USB superspeed peripherals Forum Discussions
Hi Cypress team,
We have a board built with FX3 (CYUSB3014-BZXC). Based on example from slfifosync & cyfxusbi2cregmode example, we built a firmware that use GPIF DQ[31:0] for data transfer between PCHOST--FX3IC--FPGA via a Bulk-OUT and Bulk-IN endpoints. We also enable I2C communication that use control-endpoint(0x00) to read/write to LPP devices via the function : CyFxUsbI2cTransfer (wIndex, wValue, wLength, glEp0Buffer, CyFalse); I am exploring the possibility of creating two additional endpoints for I2C. Is there example codes to create 2 additional endpoints for I2C communication?
Show LessI would like to know if the CX3 device can support this FLASH chip from Microchip: SST26WF040BT-104I/NP
The read and write commands all look like they are supported, but I'm not entirely sure about the memory organisation.
Does this mean the organisation is non-uniform? Would it be possible to use this chip somehow?
Many thanks
Hugo
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Hi,
I am trying to configure AR0330 image sensor with FX3 chip. The design is based on AN75779 example code, but with different board, same factor :
The driver for image sensor looks fine. All the remaining configuration has been written with accordance to ONSemi documentation and has been tested.
I am experiencing an issue, where amount of buffers each X frames are inconsistent, and there is no video output on host application.
First attempts resulted in DMA errors, so the DMA buffer has been extended with information that I have found on this forum, these changes include:
In file cyfxgpif2config.h the CY_U3P_PIB_GPIF_ADDR_COUNT_LIMIT has been increased to: 0x00007FEF (from 0x00003FEF). Also CY_U3P_PIB_GPIF_DATA_COUNT_LIMIT has been increased to: 0x00007FEF (from 0x00003FEF).
Later I have changed the amount of byted device can rx in single payload:
In uvc.h CY_FX_EP_BULK_VIDEO_PKTS_COUNT has been increased to 0x20, CY_FX_UVC_STREAM_BUF_COUNT was lowered to 3 (with 4 I have experienced errors).
No here is the part that I am not certain about, changes in descriptor:
The bitrate has been calculated as follows 1280x720x2x30x12 (for minimum bit rate, and additional x2 for max bit rate). AR0330 output is of RAW12 format with 12 parallel bus (we are using 8 atm due to hardware limitations). Also, the sensor output is 60FPS so descriptor was modified accordingly.
1. What is more likely the cause of this issue ? sensor setup, or UVC/DMA setup on FX3 side ?
2. Could this be caused by data format ? RAW12 instead of YUY2 ? Atm I am doing a proof of concept so I do not care about the quality of the image, that can be solved later. All i need is to see any image on host application to proceed with the project.
3. Later in the project we aim for 1980x1080 @ 30 FPS. Will this be possible with FX and USB superspeed ?
Thanks in advance for all the help and guidance.
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We use the FX3 slave FIFO interface between USB and an FPGA device as described in AN65974 and observe that after ending the software it is not longer possible to communicate if the USB is meanwhile disconnected and reconnected or the PC powered down. It is still possible to read an EEPROM via endpoint 0 and I2C, but the 32-bit synchronous slave FIFO interface of GPIF2 in automatic mode does not longer work. I tried to use VBATT instead VUSB as primary supply by using CyU3PUsbVBattEnable, but it did not help. It is necessary to switch the power of the device off and on before it works again.
Do you have any suggestions or hints?
Show LessHello,
I am currently working with the FX3 development board, and 2 different sensor (OV7670, OV426). I was able to work with the OV7670 properly, but when I have changed the descriptors for the other sensor my task manager shows 2 camera device one with proper parameters and one with invalid parameters. What can be the cause for showing 2 UVC device?
Best Regards,
Bence
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Hi, I have a problem with the transmission between the FPGA, the FX3 and the PC.
In my project I have to transmit data from the FPGA to the PC with a random data rate, it could be between 1MHz and 100MHz. (4MB/sec to 400MB/sec)
My system is designed as follow:
- FPGA: I have a self made IP core used to interface with the GPIF II peripheral of the FX3.
- FX3: the GPIF II is in "synch slave fifo" mode, with 2 bits of address, 32 bit data bus, FLAG_A (normal) and FLAG_B (partial) dedicated to thread_0 for the transmission (FPGA -> FX3), FLAG_C (normal) and FLAG_D (partial) dedicated to thread_1 for the reception (FX3 -> FPGA). The DMA is configured with 2 sockets (GPIF -> USB, USB -> GPIF) mapped to thread 0 and 1 respectively, both with 4 buffer of 16kB each. DMA is in AUTO mode.
- HOST APP: for the transmission (FPGA -> PC) I simply call the function "USBDevice->BulkInEndPt->XferData(buffer_in, length_buffer_in)" in a sort of infinite while loop.
The problem is that if I try to send 4 bytes per each clock cycle with the FPGA I can easily reach 320MB/sec without any kind of errors (which is great, it should have been 400MB/sec but considering the overhead it dropped to 320MB/sec), but if I try to send 4 bytes every 16 clock cycles (100MHz/16 = 6.25MHz = 25MB/sec) it doesn't work.
In order to reach 320MB/sec I used "length_buffer_in" = 1966080 (16kB x 120, so that the function XferData does not return before filling 120 times the DMA buffers).
I discovered that if I reduce "length_buffer_in" to 1024 the system (4 bytes every 16 clock cycles) works properly and it transmit data at 15MB/sec, but if I put "length_buffer_in" to 2048 it doesn't work anymore; the point is that the function XferData returns with timeout error caused by the fact that I am not sending data, but I am not sending data because both FLAG_A and FLAG_B are low (they indicate "dma_buffer_full").
I also tried to send 4 bytes every 8 clock cycles (50MB/sec). If I use length_buffer_in = 1024 it works at 15MB/sec, if length_buffer_in = 2048 it works at 30MB/sec, if length_buffer_in = 4096 it works at 45MB/sec, if length_buffer_in = 8192 it doesn't work (same problem, flags stay low and so I cannot write anymore to the FX3 that causes the timeout error).
If i try to send data at 100MHz (400MB/sec) or 50MHz (200MB/sec) it always work, also with length_buffer_in = 1966080, at 320MB/sec or 160MB/sec respectively.
I cannot understand which is the problem and why I cannot write slowly. Maybe the problem is that I cannot fill DMA buffers slower that the emptying rate from the USB side? Maybe should I write at 10MHz in a FIFO and then emptying the FIFO through the GPIF at 100MHz once in a while (in this way when I am in transmission phase I can transmit data at 400MB/sec, and once the FIFO is empty I go in IDLE state)?
Could you please help me?
Thank you very much
lucac
Show LessHi,
I'm trying to import and work with an existing project in Cypress EZ USB Suite 3 and modify some of the project properties but many of the project properties are not available to modify. I think it is due to poor connections and missing plugins as I cannot reliably connect to the Eclipse marketplace and I get some connection and eclipse errors upon starting USB Suite.
I have tried changing the eclipse.ini file, have played with the network connections, and tried turning off my firewall but to no avail. I am running Cypress EZ USB Suite 3 on Windows 10 on a 64 bit system.
Any help is greatly appreciated. Thank you.
Show LessHello. How can I change the byte order from little endian (default in AN75779) to big-endian.
what/where should I change in uvc and descriptor file to support it for big-endian order.
Please suggest~
Thanks.
Regards.
Show LessI use single-channel microphones in the uac1.0 specification with part of descriptors as attachments. When I constructed some PCM data myself and sent it to the host computer, my recording software said the microphone didn't work properly.
After the USB device is inserted into the host, the host can correctly identify the UAC device and display the device in the device manager.
Please give me some help and guidance.
Show LessHi,
I am developing a Windows x64 application in QT (5.15) which streams video from a CX3-connected camera (OmniVision OCHSA10 and soon to be abandoned OV9724).
- I have a separate communication thread running with TimeCriticalPriority. For testing purposes I am even not using the data I'm getting from endpoint - I am just receiving it and releasing momentarily.
- BTW (not an issue for me) only asynchronous transfer (BeginDataXfer-FinishDataXfer) works for me at all for receiving larger bulk data, like RAW frames ~1.2MB. Synchronous transfer (XferData) works only for small data, like commands.
- For each RAW frame - packets size are 36816 and 2428 for the last packet. Whenever I don't get proper readLength from FinishDataXfer I know my packet is incomplete = corrupt.
- I am testing my application on very good desktop PCs with very good motherboards as well as Dell Precision laptops (so USB hosts should be as good as it gets...) with Windows 10 x64 Pro
Now, the problem is, when I run my application on a CPU slower than top-i7 or i9, I get many incomplete packets. Typically ~20% of my frames are corrupt, so ~1% of asynchronous transfers end up in receiving incomplete packets.
The most crazy part is (I noticed it by accident): whenever I have Visual Studio running in background only 1 in about 40.000 packets is incomplete. I can't make any sense out of it (VS debugger running???) but it is 100% reproducible and as soon as I close Visual Studio ~1% of transfers is incomplete again.
I tested this both with MSVC2019 (with supplied CyAPI) and with MinGW8.1 (with CyAPI I built myself from Cypress source code) with the same result.
Please assist 🙂
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