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The maximum data rate on the MIPI data lanes when the CSI clock is at 350MHz would be 700Mbps (since MIPI samples data in DDR mode (350*2 = 700Mbps) and data is sampled on both the edges of the clock).
CX3 supports up to 1Gbps on each MIPI data lane but the overall throughput is limited to 2.4Gbps because of the 24-bit GPIF interface in CX3 with 100MHz on each lane of GPIF.