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USB Superspeed Peripherals

FuBe_4381791
New Contributor II

Hello Cypress!

I've only spent a day or 2 trying to work this one out so apologies if I've missed a resource, but the API docs and examples do not have an explanation of how the functions: CyU3PSibEraseBlocks and CyU3PSibSendSwitchCommand work....

For anyone trying to work it out too, the "unit" parameter in EraseBlocks is typically 512kb, or 524,288 bytes as set by JEDEC for 32GB drives. Your own emmc chips may differ though. blocks are typically 512 bytes, but this is chip specific as well.

My question is in the documentation for erase blocks, what parts of the uint32_t argument in SendSwitchCommand goes to what value that is used with the CSD register? As it's an extended CSD call this is hard to work out because the CSD register on emmc's is 512 bytes, not 32 so I'm alittle confused by that..

Regards!

Fujimi

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1 Solution
Rashi_Vatsa
Moderator
Moderator

Hello Fujimi,

The API CyU3PSibSendSwitchCommand 's second parameter uint32_t  argument is written to SDMMC_CMD_ARG0 register. You can refer to section 10.26.6 of the FX3 TRM

The SDMMC_CMD_ARG0 register holds the lower 32 bits of the SD/MMC/SDIO command argument. Any additional argument bits for expanded command may be placed in the SDMMC_CMD_ARG1 register. There are two copies of this register corresponding to the two storage ports

Regards,

Rashi

Regards,
Rashi

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2 Replies
Rashi_Vatsa
Moderator
Moderator

Hello Fujimi,

The API CyU3PSibSendSwitchCommand 's second parameter uint32_t  argument is written to SDMMC_CMD_ARG0 register. You can refer to section 10.26.6 of the FX3 TRM

The SDMMC_CMD_ARG0 register holds the lower 32 bits of the SD/MMC/SDIO command argument. Any additional argument bits for expanded command may be placed in the SDMMC_CMD_ARG1 register. There are two copies of this register corresponding to the two storage ports

Regards,

Rashi

Regards,
Rashi

View solution in original post

FuBe_4381791
New Contributor II

Brilliant thank you!

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