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USB Superspeed Peripherals

Anonymous
Not applicable

 Hi,

   

I had read the DVK description as well as the AN76405. Both documents describe that the MISO and MOSI lines in SPI boot mode should not be connected to a pull up resistor. I do not know if it will work when I have connect those pins also to a FPGA I/O? Can anybody tell me a specifically description of the behaviour of MOSI and MISO lines.

   

thanks, 

   

lumpi

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