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USB Superspeed Peripherals

Anonymous
Not applicable

 Hi!

   

 

   

I'm testing the streaming in firmware on the FX3.

   

Using a fifo 32 bit interface between Spartan 6 FPGA and FX3,

   

i'm trying to read a simple counter inside the FPGA from Control Center.

   

What's troubling me is that, after resetting both FPGA and FX3, when I press "Transfer Data-IN",

   

the first 32 bit I read is different from 0.

   

This lead me to think that as soon as I program the FPGA it starts to count and write into FX3 DMA buffer.

   

How can I read sequentially the counter avoiding data loss?

   

 

   

Thank you!

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Anonymous
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 Hi,     

 

   

You can avoid this problem by having a sync mechanism between FX3 and Xilinx FPGA.     

 

   

You can use a GPIO for this purpose.     

 

   

You can change the state of that GPIO after FX3 is programmed and ready to do data transfers.     

 

   

We implemented this in the firmware files that are attached to the following application note:     

 

   

AN65974 - Designing with the EZ-USB® FX3™ Slave FIFO Interface     

 

   

We used GPIO 59 in the application note firmware.     

 

   

Thanks,     

 

   

Sai Krishna.     

 

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