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USB Superspeed Peripherals

KaKa_4637276
New Contributor II

AR0431 settings:

Image format: RAW8

Resolusion: 2304x1746 30fps

MIPI 4 lanes

Please, tell me what settings for CX3 i should set

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JayakrishnaT_76
Moderator
Moderator

Hello,

Apologies for making a mistake in the configuration. The CSI clock cannot be as large as 1120Mhz when we are using 4 lanes. Theoretically, the CSI clock cannot exceed 500MHz. Please let me know what exactly you meant by MIPI Data rate in your response 2?

Best Regards,

Jayakrishna

Best Regards,
Jayakrishna

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JayakrishnaT_76
Moderator
Moderator

Hello,

Please let me know the following details of image sensor so that I can share the corresponding settings for CX3.

-THS-Prepare

-THS-Zero

-CSI Clock

-H-Blanking and V-Blanking

-Output Video Format

Best Regards,

Jayakrishna

Best Regards,
Jayakrishna
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KaKa_4637276
New Contributor II

THS-Prepare and THS-Zero is not critical

H-Blanking: 2300

V-Blanking: 424

MIPI Data Rate: 1120MHz

Output Video Format RAW: CY_U3P_CSI_DF_RGB888

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JayakrishnaT_76
Moderator
Moderator

Hello,

Please find the snapshots of the Image Sensor configuration and CX3 Receiver Configuration Tabs of MIPI Configuration Utility Below:

pastedImage_1.png

pastedImage_0.png

Please note that the THS-Prepare and THS-Zero values are actually required to calculate the PHY time delay Value. In the above configuration, PHY Time delay value corresponds to that obtained by using the default values for THS-Prepare and THS-Zero presented by the MIPI Configuration Utility.

Best Regards,

Jayakrishna

Best Regards,
Jayakrishna
KaKa_4637276
New Contributor II

Unfortunately, this settings don't work

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JayakrishnaT_76
Moderator
Moderator

Hello,

Please let me know what is the issue that you are facing with this settings.

Best Regards,

Jayakrishna

Best Regards,
Jayakrishna
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KaKa_4637276
New Contributor II

There is no Hsync, Vsync.

Hsync:

20200212_150227.jpg

Vsync:20200212_150116.jpg

JayakrishnaT_76
Moderator
Moderator

Hello,

Please let me know from where have you probed these traces. Are they probed from the sensor directly or from the test points available in CX3.

Also, please let me know if you are getting any MIPI errors. You can obtain this by enabling the macro CX3_DEBUG_ENABLED in cycx3_uvc.h.

Best Regards,

Jayakrishna

Best Regards,
Jayakrishna
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KaKa_4637276
New Contributor II

These waveforms were made from control points of CX3

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JayakrishnaT_76
Moderator
Moderator

Hello,

Please probe the signals from the sensor and share it with me. This can be used to understand if the sensor is sending out data correctly or not.

Also, as I mentioned in my previous response, please enable the macro CX3_DEBUG_ENABLED in cycx3_uvc.h and share the UART debug logs.

Best Regards,

Jayakrishna

Best Regards,
Jayakrishna
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JayakrishnaT_76
Moderator
Moderator

Hello,

Apologies for making a mistake in the configuration. The CSI clock cannot be as large as 1120Mhz when we are using 4 lanes. Theoretically, the CSI clock cannot exceed 500MHz. Please let me know what exactly you meant by MIPI Data rate in your response 2?

Best Regards,

Jayakrishna

Best Regards,
Jayakrishna

View solution in original post