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USB Superspeed Peripherals

Anonymous
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Hi, I'm using CYUSB3KIT-003 and I implemented the syncronous Slave with state machine of the AN65974 example (32bits). The problem is with some bits of the GPIF II have an offset around 1.2V and the FPGA can't detect the zero level. For some reasons it is influenced with the presence of the watermark flag. The bits afected isn't the same with another FX3.

Do you have any idea what is going on?

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Anonymous
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I removed the J5 jumper and all signal are correct. So it is recomended not connect the jumper if don't work with the SRAM

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Anonymous
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Some details: The master is a FPGA, It reads data from FX3 using the DMA_ready flag. At the moment it's only a reading test. The FPGA reads "correctly" with an offset in some bits. 

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Anonymous
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I removed the J5 jumper and all signal are correct. So it is recomended not connect the jumper if don't work with the SRAM

View solution in original post

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