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USB Superspeed Peripherals

WoHa_955446
Contributor

Dears.

We are designing our system as the following.

pastedImage_1.png

pastedImage_2.png

Our questions are 

  • current selected items of "FX3 peripheral used" in GPIF like I2C and spi in accordance with data width 24Bit is correct ?
  • If we want to use 32bits data width, is it possible to use SPI and data width 32bits simultaneously ?

Thanks and regards,

WonjinHan


 
 
 
 
 
 
 
 
 
 
 
 



Thanks and best
regards,

Wonjin Han.

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1 Solution
JayakrishnaT_76
Moderator
Moderator

Hello,

Please find my comments on your questions below:

1. When 24 bit data bus is used, FX3 supports I2C and SPI. Please refer to Table 7 of FX3 datasheet to understand more about Pin description of FX3. The link to the same is given below:

https://www.cypress.com/file/140296/download

When you configure the data bus width as 24 bits, the pins corresponding to data bus can be understood from the GPIF II Designer itself. Now, in the firmware, you can configure the IO Matrix as follows (GPIOs are not mentioned)

pastedImage_1.png

With this setting, all the peripherals (UART,SPI,I2S,I2C) will be available at the pins as mentioned in the column "16 bit data bus + UART + SPI + I2S" in Table 7 of FX3 datasheet.

2. In 32 bit data bus mode, SPI block is not supported by FX3. Please refer to the column "32 bit data bus" in Table 7 of FX3 datasheet to understand about the peripherals supported in 32 bit data bus mode.

Is the state machine a  modified form of the one that comes along with AN75779? Also, I suppose you plan to drive CS1 and CS2 from the state machine. But, I found only one GPIO configured as Output as per the snapshot of interface definition tab of GPIF II designer. Please check this.

Best Regards,

Jayakrishna

Best Regards,
Jayakrishna

View solution in original post

2 Replies
JayakrishnaT_76
Moderator
Moderator

Hello,

Please find my comments on your questions below:

1. When 24 bit data bus is used, FX3 supports I2C and SPI. Please refer to Table 7 of FX3 datasheet to understand more about Pin description of FX3. The link to the same is given below:

https://www.cypress.com/file/140296/download

When you configure the data bus width as 24 bits, the pins corresponding to data bus can be understood from the GPIF II Designer itself. Now, in the firmware, you can configure the IO Matrix as follows (GPIOs are not mentioned)

pastedImage_1.png

With this setting, all the peripherals (UART,SPI,I2S,I2C) will be available at the pins as mentioned in the column "16 bit data bus + UART + SPI + I2S" in Table 7 of FX3 datasheet.

2. In 32 bit data bus mode, SPI block is not supported by FX3. Please refer to the column "32 bit data bus" in Table 7 of FX3 datasheet to understand about the peripherals supported in 32 bit data bus mode.

Is the state machine a  modified form of the one that comes along with AN75779? Also, I suppose you plan to drive CS1 and CS2 from the state machine. But, I found only one GPIO configured as Output as per the snapshot of interface definition tab of GPIF II designer. Please check this.

Best Regards,

Jayakrishna

Best Regards,
Jayakrishna

View solution in original post

WoHa_955446
Contributor

Hello Jayakrishna.

I really appreciate your comments and now am checking them out in my side.

Best regards,

Wonjin.

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