I2C BASE ADDRESS

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gean_3054931
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Hello,

The i2c master in fx3 is using below address

#define I2C_BASE_ADDR                            (0xe0000400)

I am trying to implement i2c slave in fx3.

so  (0xe0001400) and  (0xe0008120) adress are unsed in fx3.

I am considering gpio 26 as i2c data and gpio 27 as i2c clock.

should i use different base address for i2c slave?or same address ?

The source code for i2c is cyu3i2c.c is taken from the fx3 dvk installed path.

can i reuse this driver with modification for i2c slave?

can anyone help me to write code for i2c slave in fx3.

Thanks.

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Hemanth
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Hi,

You cannot use unused registers for trying to implement I2C Slave in FX3. You need not modify cyu3i2c.c

The existing registers in FX3 are for I2C master. If you want to try implementing I2C Slave, then you would need to configure the GPIOs which you intend to use (i.e 26 and 27) as input/output in your firmware and drive/sample them according to I2C protocol.

Regards,

Hemanth

Hemanth

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Hemanth
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Hi,

You cannot use unused registers for trying to implement I2C Slave in FX3. You need not modify cyu3i2c.c

The existing registers in FX3 are for I2C master. If you want to try implementing I2C Slave, then you would need to configure the GPIOs which you intend to use (i.e 26 and 27) as input/output in your firmware and drive/sample them according to I2C protocol.

Regards,

Hemanth

Hemanth

Hello Hemanth,

I understood.

how can i initialise i2c ?where to begin?

thanks,

geetha

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Hello hemanth,

I have taken the code for i2c slave.I modefied according into the fx3 firmware.can you please verify this.

and this code is not working on our side.

thanks

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Hi Geetha,

The code which you shared may not follow the timing constraints required for the I2C slave.

We tried configuring GPIO as I2C Slave by writing the code in the GPIO interrupt callback but  we are not able to match the timing constraints.

So it is not possible to configure GPIO as I2C Slave.

Regards,

Rashi

Regards,
Rashi
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Hi rashi,

We tried configuring GPIO as I2C Slave by writing the code in the GPIO interrupt callback but  we are not able to match the timing constraints.

can you share your firmware ?

So it is not possible to configure GPIO as I2C Slave.

is fx3 gpios are not able to meet the timing constraints?please tell me why its not possible?

thanks.

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Hi Geetha,

Please refer the attached UsbSpiGpioMode firmware. I have made changes in the GPIO interrupt callback function. I am toggling the GPIO 40 for testing purpose when the SDA goes low (negative edge) and SCL is high i.e the start bit but i didn't get proper results.

Also tried to check the time taken to call the GPIO interrupt call back function after the Negative Edge. From the traces attached, it could be seen it takes 9.32 micro second to call the GPIO interrupt call back function which is not meeting the timing constraints.

Regards,

Rashi

Regards,
Rashi
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Hi rashi,

you have configured interrupt for i2c_data and measuring callback interrupt for gpio i2c-scl(in your snip.PNG).

I am asking particularly about FX3 GPIO's.

is fx3 gpios are not able to meet the timing constraints?how sure are you?

thanks

geetha.

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Hi Geetha,

In the firmware which i shared in the previous response, my focus was to detect the start bit for which i used the GPIO interrupt callback. GPIO callback to detect the transitions on the GPIO. The call back will be called when there is a neg edge transition on SDA line. In the callback i wanted to sample the SCL line when SDA is transitioning from high to low, if it is high i.e start bit is detected (GPIO toggling). But this didn't work (The start bit was not detected)  Refer to the attachment.

Then i checked the time difference when the transition takes place on SDA and the call back function is called (snip.png) (testing purpose). From the snippet i shared previously, we can see that toggling is much later from the start bit.

Also later, if we want to sample SDA on every positive edge of SCL every time there will be this delay to callback function which would lead to loss in data.

Regards,

Rashi

Regards,
Rashi
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Hi Rashi,

I Understood that what you are doing.

How you are giving clock and data.

what is the clock rate for i2c clock.

have you tried with lower clock rate?

thanks

geetha

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Hi Geetha,

The clock and data are given by another FX3 configured as master. I have implemented it using UsbI2cRegMode firmware loaded on to fx3 and passing the vendor commands.

The i2c clock rate is 100KHz.

Regards,

Rashi

Regards,
Rashi
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Hi rashi ,

I have tested start bit detection in my side.

When negative edge is detected on sda line,callback is called.Inside that callback i am looking for scl high condition.if it is high gpio 50 is also going high.start bit is detecting.please look for an attachment.

I am not sure that inside callback function,is it looking for first clock high.

thank you.

Geetha

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Hi Geetha,

I reproduced the traces from the firmware you shared. It is showing 13 micro second difference between SDA transition and toggling(reading of SCL) for the least SCL (100 Hz). For sampling the data properly, we would need this difference < 11 micro second.

Refer the attachment.

Regards,

Rashi

Regards,
Rashi
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Hi rashi,

are you saying that interrupt latency for sda GPIO is more?

inside ISR/CALLBACK, we are not able to get scl GPIO pin status as one for falling edge of sda(i.e start bit condition)?

In gpio1.PNG

What are signals name reference to SDA(02),SCL(01,)GPIO I2C-SDA(02)?

are you measuring/probing GPIO 40(in your case) or GPIO 50(in my firmware ) ?is this same as GPIO I2C-SDA(02) signal?

Thank  you,

geetha.

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Hi Geetha,

Yes the interrupt latency is more for SDA GPIO.

The interrupt latency should be much less (<5 microseconds for 100KHz) as after detecting the start bit we would need to change the GPIO config to set SCL GPIO to  positive edge interrupt and sample for SDA before the SCL goes high.

I had checked for both GPIO 40  as well as 50 but the traces were same. In gpioapp.png, i have checked the firmware you shared and it can be seen the interrupt latency is more which leads to data loss (toggling of GPIO after positive edge of SCL).

In gpio1.png, i have checked with my firmware which shows similar thing.

For both the traces: Channel 00 - GPIO

                                Channel 01 - SCL

                                Channel 02 - SDA

Regards,
Rashi
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Hi Rashi,

If SCL is 1KHz,How much time CyU3PGpioGetValue(58,&highlow) API will take to sample the i2c data with respect to CLOCK?

can you measure it and say?

if interrupt latency is more for fx3 gpio,CyU3PGpioGetValue(58,&highlow) API can meet the i2c timing constraints?

please confirm me that fx3 gpios are not able to meet the i2c timing constraints even i2c clock rate is 100Hz?

Thanks,

geetha

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Hi Geetha,

The least frequency I2C Master can support is 100KHz.

No, the CyU3PGpioGetValue() cannot meet the timing constraints for I2C Slave.

Regards,

Rashi

Regards,
Rashi
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Hi,

Rashi,

In our board VIO5 is 3.3 V,I have worked on I2C Master which runs on 10kHz.

For fx3 i2c slave,we are trying to work for atleast 1kHz.

Thanks,

geetha.

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Hi Geetha,

You can try the firmware with the interrupt callback which i shared i my previous response. You can try matching the timing constraints with lower SCL frequency.

Regards,

Rashi

Regards,
Rashi
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