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USB Superspeed Peripherals

New Contributor

Hi there,

I have seen in the CX3 reference schema from eCon Systems (Denebola) that the VCC_CLK is getting after LC filter.

I would like to know if this LC filter is there to remove the generated noise from output LDO voltage. Or to remove the possible hight initial inrush current from pin B6(CVDDQ).

In the first case, VCC_CLK is in correct position, after LC filter. But in the second case, It is not better to place the exit of VCC_CLK just before LC filter, in order to mitigate the impact of the possible initial hight exit current in B6 pin?

Thanks.

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Moderator
Moderator

Hello,

"this LC filter is there to remove the generated noise from output LDO voltage"

--> The LC filter is placed to not let any of the noise added to the input of the CVDDQ (pin B6) voltage domain.

The same has been mentioned in Section 4.2 (the last paragraph) in AN70707 as below:

pastedImage_0.png

Figure 1 that the above line points to is:

pastedImage_2.png

Regards,

Yashwant

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1 Reply
Moderator
Moderator

Hello,

"this LC filter is there to remove the generated noise from output LDO voltage"

--> The LC filter is placed to not let any of the noise added to the input of the CVDDQ (pin B6) voltage domain.

The same has been mentioned in Section 4.2 (the last paragraph) in AN70707 as below:

pastedImage_0.png

Figure 1 that the above line points to is:

pastedImage_2.png

Regards,

Yashwant

View solution in original post

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