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Anonymous
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May 03, 2013
12:52 AM
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May 03, 2013
12:52 AM
I encounter an problem when about using GPIF at 100MHz in synchronous-slave-fifo-write mode. The scenario is as below: the pclk is 100MHz, SLWR write 16KB to GPIF, and switch the FIFO ADDR. But after SLWR sending the next 16KB, the flagb will be valid, and keep valid all the time. Then SLWR could not write data any more, so did GPIF.
3 Replies
May 03, 2013
03:57 AM
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May 03, 2013
03:57 AM
Thank you for starting so many threads for the same subject, doesn't make it easy to decide where to put an answer to...
Bob
Anonymous
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May 05, 2013
07:35 AM
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May 05, 2013
07:35 AM
Anonymous
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May 13, 2013
10:00 PM
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May 13, 2013
10:00 PM
Sorry for making duplicate threads, please delete this one.