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USB Superspeed Peripherals

alex_swan
New Contributor

Hello everyone,

In my current project, I am required to send 16 bits data from a FIFO inside FPGA (Cyclone  IV E) to PC through FX3.

I followed AN65974 note and ran the given example code for Stream IN Transfer, which I assume is appropriate for the application here. It seemed to work without failures on streamer GUI at 100MHz.

Since the FIFO in FPGA is being written at much slower speed, I wanted to slow down GPIF interface as well. However, when I tried slower clocks, says 50 MHz, the transfer failed. I only changed PLL on FPGA side which drives pclk.

Am I required to change anything from firmware side for the slower clock speed?

Also, since I am clearly a novice in this area, I appreciate any pointers on how I should read the FIFO inside FPGA to send data over GPIF.

Thank you very much for your time.

 

 

 

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1 Solution
Rashi_Vatsa
Moderator
Moderator

Hello,

Please enable the following UART prints in the SlFifoAppThread_Entry firmware and let me know if the data is being received (glDMATxCount) on FX3 from the FPGA with slower clock.

CyU3PDebugPrint (6, "Data tracker: buffers received: %d, buffers sent: %d.\n",
glDMARxCount, glDMATxCount);*/

If the data is received as expected, please try to reduce the Packets per Xfer, Xfer per Queue parameters in the streamer application and let me know is the failures are reduced

Regards,
Rashi

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3 Replies
Rashi_Vatsa
Moderator
Moderator

Hello,

Please enable the following UART prints in the SlFifoAppThread_Entry firmware and let me know if the data is being received (glDMATxCount) on FX3 from the FPGA with slower clock.

CyU3PDebugPrint (6, "Data tracker: buffers received: %d, buffers sent: %d.\n",
glDMARxCount, glDMATxCount);*/

If the data is received as expected, please try to reduce the Packets per Xfer, Xfer per Queue parameters in the streamer application and let me know is the failures are reduced

Regards,
Rashi

View solution in original post

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alex_swan
New Contributor

Hello Rashi,

I enabled CyU3PDebugPrint () and received a strange prints with both glDMARxCount and glDMATxCount == 0

Capture2.PNG

glDMARxCount and glDMATxCount are incremented in CyFxSlFifoUtoPDmaCallback() and CyFxSlFifoPtoUDmaCallback() functions which are not enabled in AUTO DMA mode in the example code. Can I enable it?

I tried to reduce the Packets per Xfer, Xfer per Queue parameters in the streamer and saw no improvement. 

Thank You.

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Rashi_Vatsa
Moderator
Moderator

Hello,

Yes, please enable #define MANUAL and share the UART prints

Regards,

Rashi

Regards,
Rashi
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