The FX3 first configures the FPGA using SPI lines and then again IO matrix is reconfigured for the 32-bit interface. The FX3 has to stream a video of resolution 962*766 @ 60FPS. I have modified the design as per the 32-bit interface.
I added the function
CyU3PGpioDeInit();
CyU3PSpiDeInit();
New IO matrix for 32bit interface
After FPGA configuration. FPGA got programmed successfully but I am not able to stream the image. The log message shows “Error in CyU3PDmaMultiChannelCommitBuffer: code 71”
Then I modified as per
"Invalid Sequence Error in Multi-Channel Commit Buffer - KBA218830"
After that, I am getting the same error. I have attached the code for your reference.
