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Hi,
i want to transfer some bytes of data from FX3 to DDR3.For that my application is
FX3 -----> FX3 ------> FPGA
(U-Port) (P-Port) GPIF ii
I am using Slavefifosync firmware and modified to meet my application.I am able to transfer data from U-Port to P-Port of FX3.
My question is how to transfer data from P-Port of FX3 to FPGA(Zynq side).
Regards,
Aswini.
Solved! Go to Solution.
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Hello Aswini,
Please refer to section 5.1 and 5.2 of the Application Note AN65974. The link to the application note is given below:
https://www.cypress.com/file/136056/download
For successful read operation from the FIFO, you should make sure that the timing diagram mentioned in section 5.1 is followed strictly. The FPGA should implement this. Also, please refer to table 3 to understand the different timings mentioned in section 5.1.
Best Regards,
Jayakrishna
Jayakrishna