FX3 "Self Powered" Architecture Questions

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WaRa_4824346
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I would like to use the FX3 as an interface to a Xilinx FPGA in "self powered" mode.  The FX3 also does power management for the system by enabling and disabling the switching regulators that power the Xilinx FPGA and a USB Host.  The FX3 also turns power to a USB host system on and off as well.  The FX3 is powered by a separate +3.3V (may be +3.6V ??)  and +1.2V regulators continuously.

Refer to the proposed self powered architecture diagram below....

 

Capture.PNG

FX3 VIO2, VIO3 and VIO5 remain powered continuously as the GPIOs associated with a particular VIO turn power on and off to the host and to the Xilinx FPGA as well as UART and JTAG interfaces for debugging.

FX3 VIO1 and VIO4 power the Synchronous Slave FIFO and SPI interfaces.  When the Xilinx FPGA I/O (I/O bank is powered by +3.3V) is powered down both VIO1 and VIO4 are powered down as well.  This is done to avoid driving the inputs of an FPGA that is not powered.  The Xilinx FPGA will be damaged if it's inputs are driven above 2.5V when the FPGA is powered down.

Since the FX3 is the main system controller it must boot from either I2C or SPI.  Given that the SPI interface is used for other FPGA interactions the only alternate is to boot from I2C.

Questions:

1.  The FX3 data sheet states that there are NO power sequencing requirements for the various power inputs.  Will the FX3 be damaged or not operate correctly, if the power to VIO1 and VIO4 is removed?  (Of course, the SPI and Synchronous Slave FIFO interface won't work but they are not needed when the system is in a low power state).

2. A "self powered" FX3 configuration is not clearly described in the data sheet or other FX3 collateral.  Looking at the schematic for CYUSB3KIT-001, it seems that VBUS is NOT connector but VBATT is connected to power the FX3.  VBATT may be between 3.2V to 6.0V.  A 3.3V supply may work but its output voltage tolerance will need to be checked carefully.  Is my understanding correct for using the FX3 in a "self powered" configuration?  Perhaps, powering the FX3 from 3.6V might be better as there will be more margin on the VBATT supply.

3. One of the KBA mentions enumeration problems in "self powered" mode with the boot loader.  The FX3 is always powered or at least is powered up first.  A non removable USB host is always connected to the FX3.  The FX3 controls power to the USB host.   I could connect VBUS through a 2:1 voltage divider to a GPIO to permit the FX3 to observe when the USB host has powered up the USB interface.  The firmware could then take appropriate action.  Please explain this "enumeration problem" and what might be done to work aorund it.

4. How long does the FX3 take to boot from I2C at 400 KHz or 1 MHz? 

5. When developing code and debugging, I want to boot from USB not I2C.  Is this possible?  Should the use "the boot from I2C but fall back to USB" boot mode be used?

6.  Can the I2C boot EEPROM be written from USB?  If so, how?

7.  Does the FX3 expect that I2C boot EEPROM be located at address 0x00? Can other I2C devices with different addresses also be connected to the I2C bus without interfering with the boot process?

Thanks for your help with such a long query!

Wayne

 

 

 

 

 

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1 Solution
Rashi_Vatsa
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5 likes given 500 solutions authored 1000 replies posted

Hello Wayne,

Please find the response to your queries

1.  The FX3 data sheet states that there are NO power sequencing requirements for the various power inputs.  Will the FX3 be damaged or not operate correctly, if the power to VIO1 and VIO4 is removed?  (Of course, the SPI and Synchronous Slave FIFO interface won't work but they are not needed when the system is in a low power state).

>> Please refer to Errata 1 of the FX3 datasheet which mentions that VIO1 must stay on during Normal, Suspend, and Standby modes. Also, VIO1 powers PMODE[2:0] lines which are used for booting of FX3. So we do not recommend to remove VIO1

2. A "self powered" FX3 configuration is not clearly described in the data sheet or other FX3 collateral.  Looking at the schematic for CYUSB3KIT-001, it seems that VBUS is NOT connector but VBATT is connected to power the FX3.  VBATT may be between 3.2V to 6.0V.  A 3.3V supply may work but its output voltage tolerance will need to be checked carefully.  Is my understanding correct for using the FX3 in a "self powered" configuration?  Perhaps, powering the FX3 from 3.6V might be better as there will be more margin on the VBATT supply.

>> Please refer to section 4 of AN70707 which mentions that the USB I/O requires a 3.3-V regulated power supply. This supply is internally driven from either the VBUS or VBATT external supplies. VBATT/VBUS can be turned OFF if USB is not used. If the USB port is used, one or both supplies must be present. VBATT can be connected to the system battery or a stable 3.2 V–6 V voltage rail from the PMIC.

3. One of the KBA mentions enumeration problems in "self powered" mode with the boot loader.  The FX3 is always powered or at least is powered up first.  A non removable USB host is always connected to the FX3.  The FX3 controls power to the USB host.   I could connect VBUS through a 2:1 voltage divider to a GPIO to permit the FX3 to observe when the USB host has powered up the USB interface.  The firmware could then take appropriate action.  Please explain this "enumeration problem" and what might be done to work aorund it.

>> VBUS pin of FX3 is used to detect the connection to the host for self powered. If both the VBUS and VBATT are powered, Fx3 by default takes power only from VBUS pin. So, in your case, as Fx3 's USB IO draws power from the VBATT pin (LDO) and not from VBUS pin (Computer). So, you need to call CyU3PUsbVBattEnable API in your firmware. You need to call this API before the CyU3PConnectState API.

Please confirm if you are referring to the enumeration problem mentioned in Errata 2 of Fx3 datasheet. If yes, the workaround is provided there.

4. How long does the FX3 take to boot from I2C at 400 KHz or 1 MHz? 

>> It will vary based on the firmware size and the I2C clock frequency

5. When developing code and debugging, I want to boot from USB not I2C.  Is this possible?  Should the use "the boot from I2C but fall back to USB" boot mode be used?

>> You can configure the PMODE lines for I2C boot with USB fallback and let the I2C boot fail so that the bootloader will fall to USB boot. 

6.  Can the I2C boot EEPROM be written from USB?  If so, how?

>> If the FX3 is configured for USB boot you can use Cypress USB Control Center Application from the FX3 SDK and to load the firmware in the FX3 RAM, select Program > FX3 > I2C EEPROM.

7. Does the FX3 expect that I2C boot EEPROM be located at address 0x00? Can other I2C devices with different addresses also be connected to the I2C bus without interfering with the boot process?

>> Please refer section 5 and 6 of AN76405. 

I2C Devices with different slave address can be connected to FX3. Use FX3 as single I2C master.

Regards,
Rashi

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Rashi_Vatsa
Moderator
Moderator
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5 likes given 500 solutions authored 1000 replies posted

Hello Wayne,

Please find the response to your queries

1.  The FX3 data sheet states that there are NO power sequencing requirements for the various power inputs.  Will the FX3 be damaged or not operate correctly, if the power to VIO1 and VIO4 is removed?  (Of course, the SPI and Synchronous Slave FIFO interface won't work but they are not needed when the system is in a low power state).

>> Please refer to Errata 1 of the FX3 datasheet which mentions that VIO1 must stay on during Normal, Suspend, and Standby modes. Also, VIO1 powers PMODE[2:0] lines which are used for booting of FX3. So we do not recommend to remove VIO1

2. A "self powered" FX3 configuration is not clearly described in the data sheet or other FX3 collateral.  Looking at the schematic for CYUSB3KIT-001, it seems that VBUS is NOT connector but VBATT is connected to power the FX3.  VBATT may be between 3.2V to 6.0V.  A 3.3V supply may work but its output voltage tolerance will need to be checked carefully.  Is my understanding correct for using the FX3 in a "self powered" configuration?  Perhaps, powering the FX3 from 3.6V might be better as there will be more margin on the VBATT supply.

>> Please refer to section 4 of AN70707 which mentions that the USB I/O requires a 3.3-V regulated power supply. This supply is internally driven from either the VBUS or VBATT external supplies. VBATT/VBUS can be turned OFF if USB is not used. If the USB port is used, one or both supplies must be present. VBATT can be connected to the system battery or a stable 3.2 V–6 V voltage rail from the PMIC.

3. One of the KBA mentions enumeration problems in "self powered" mode with the boot loader.  The FX3 is always powered or at least is powered up first.  A non removable USB host is always connected to the FX3.  The FX3 controls power to the USB host.   I could connect VBUS through a 2:1 voltage divider to a GPIO to permit the FX3 to observe when the USB host has powered up the USB interface.  The firmware could then take appropriate action.  Please explain this "enumeration problem" and what might be done to work aorund it.

>> VBUS pin of FX3 is used to detect the connection to the host for self powered. If both the VBUS and VBATT are powered, Fx3 by default takes power only from VBUS pin. So, in your case, as Fx3 's USB IO draws power from the VBATT pin (LDO) and not from VBUS pin (Computer). So, you need to call CyU3PUsbVBattEnable API in your firmware. You need to call this API before the CyU3PConnectState API.

Please confirm if you are referring to the enumeration problem mentioned in Errata 2 of Fx3 datasheet. If yes, the workaround is provided there.

4. How long does the FX3 take to boot from I2C at 400 KHz or 1 MHz? 

>> It will vary based on the firmware size and the I2C clock frequency

5. When developing code and debugging, I want to boot from USB not I2C.  Is this possible?  Should the use "the boot from I2C but fall back to USB" boot mode be used?

>> You can configure the PMODE lines for I2C boot with USB fallback and let the I2C boot fail so that the bootloader will fall to USB boot. 

6.  Can the I2C boot EEPROM be written from USB?  If so, how?

>> If the FX3 is configured for USB boot you can use Cypress USB Control Center Application from the FX3 SDK and to load the firmware in the FX3 RAM, select Program > FX3 > I2C EEPROM.

7. Does the FX3 expect that I2C boot EEPROM be located at address 0x00? Can other I2C devices with different addresses also be connected to the I2C bus without interfering with the boot process?

>> Please refer section 5 and 6 of AN76405. 

I2C Devices with different slave address can be connected to FX3. Use FX3 as single I2C master.

Regards,
Rashi
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Rashi

Your efforts to answer my questions is sincerely appreciated. Thank you.

Following your guidance, I have modified the architecture.   A separate PSoC4 will be assigned the task of power management.   Using a PSoC4 for power management cleanly separates the power domains and helps to avoid driving an unpowered FPGA from the FX3. 

The FX3 and FPGA are now in the same power domain and the PSoC4 is in another.  The only bridge between the power domains is the I2C bus from the FX3.  The I2C bus will be used to send power management commands ("sleep for XX time duration", etc) to the PSoC4 from the USB host.

I have two alternatives for powering the FX3 in new architecture:

1.  Use a "bus powered" style where USB host power is connected to VBUS.  The +1.2V for VDD, AVDD, RXVDDQ and TXVDDQ are generated from a regulator powered from VBUS.  Power for all of the VIO(x) is provided by FPGA power supplies.  CVDDQ is also powered from the FPGA supplies.  VIO(x) power is continuously applied unless the FX3 and FPGA are entirely powered down.

2. Use a "self powered" arrangement where USB host power not used.  +3.3V from the FPGA supplies is connected to VBATT (not VBUS) and all VIO(x) and CVDDQ is also provided from the FPGA supplies.  The FPGA supply output voltages are accurate +/-1.5% which leaves 50 mV of margin on the +3.3V supplied to on the VBATT ball.

I prefer to use #1 above as it is easier to implement (fewer regulators) and has better power supply margins. 

Questions:

1.  In alternative #1 above, are there any concerns about powering VIO(x) and CVDDQ from a supply not derived from VBUS?  VIO(x) will be powered first before VDD, AVDD, RVDDQ and TXVDDQ.   The FPGA has power sequencing requirements that don't allow its IOs to be easily powered from VBUS.

2. Using a 400 KHz clock with 1Mbit bit firmware load (code and initialized data) from the I2C EEPROM how load will the FX3 take to boot from the EEPROM?

Again, your help is much appreciated...

Wayne

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Hello Wayne,

1.  In alternative #1 above, are there any concerns about powering VIO(x) and CVDDQ from a supply not derived from VBUS?  VIO(x) will be powered first before VDD, AVDD, RVDDQ and TXVDDQ.   The FPGA has power sequencing requirements that don't allow its IOs to be easily powered from VBUS.

>> Please refer to this thread Powering the FX3 / Using a hub on D+ and D- - Cypress Developer Community 

2. Using a 400 KHz clock with 1Mbit bit firmware load (code and initialized data) from the I2C EEPROM how load will the FX3 take to boot from the EEPROM?

>>  We do not have exact timings as there can be delay, based on the I2C EERPROM used, for accessing the pages of the I2C EEPROM. You can try I2C boot on FX3 explorer kit. Theoretically, when I2C is in full speed mode ( I2C clock is 400 KHz) 400Kbits/s is data rate. So, calculating for 1Mbit should take approx ~2.5s.

Regards,
Rashi
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