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USB Superspeed Peripherals

AlEr_4025481
New Contributor II

Hi,

I made a simple GPIF-II design to read one 16-bit word to processor socket when external WE signal turns from low to high. Is timing tab for my design correct? I was expecting DATA_IN operation should happen at the beginning of STATE1, but not STATE0.  My design is attached below.

2021-06-18_00-31-23.png2021-06-18_00-31-58.png

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1 Solution
AliAsgar
Moderator
Moderator

Hello,

The timing diagram in GPIF designer tool is not reliable. Kindly probe the signals at your end and verify.

Best Regards,
AliAsgar

View solution in original post

1 Reply
AliAsgar
Moderator
Moderator

Hello,

The timing diagram in GPIF designer tool is not reliable. Kindly probe the signals at your end and verify.

Best Regards,
AliAsgar

View solution in original post