FX3 UVC FPGA AN75779

Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

cross mob
Tomek
Level 1
Level 1
First solution authored First reply posted First question asked

Hi,

I want to transfer video data from FPGA to PC by using custom board  FX3- CYUSB2014. Output data from FPGA : 640x480, 30 fps, 90 MHz clock, YUY2 format, 8 bit data bus connected with  2.0 USB cable  to host PC. I edited AN75779 firmware but without success. I use VLC, USBVideoClassBulk works fine on my hardware. Is there anything am missing to change?

Tom

In  cyfxuvcdsr.c file

 

/* Standard High Speed Configuration Descriptor */

 

/* Class specific Uncompressed VS Frame descriptor */

        0x1E,                           /* Descriptor size */

        0x24,                           /* Descriptor type*/

        0x05,                           /* Subtype: uncompressed frame I/F */

        0x01,                           /* Frame Descriptor Index */

        0x01,                           /* Still image capture method 1 supported */

        0x80,0x02,             //z         /* Width in pixel: 640 VGA */

        0xE0,0x01,             //z         /* Height in pixel 480 VGA */

        0x00,0x00,0xCA,0x08,   //z         /* Min bit rate bits/s. 640x480x30x16

        0x00,0x00,0xCA,0x08,    //z        /* Max bit rate bits/s. Not specified, taken from MJPEG */

        0x00,0x60,0x09,0x00,    //z        /* Maximum video or still frame size in bytes(Deprecated) */

        0x15,0x16,0x05,0x00,      //z      /* Default Frame Interval 30 fps*/

        0x01,                           /* Frame interval(Frame Rate) types: Only one frame interval supported */

in uvc.c file

uint8_t glProbeCtrl20[CY_FX_UVC_MAX_PROBE_SETTING] = {

    0x00, 0x00,                 /* bmHint : no hit */

    0x01,                       /* Use 1st Video format index */

    0x01,                       /* Use 1st Video frame index */

    0x15,0x16,0x05,0x00, //z     /* Desired frame interval in the unit of 100ns: 30 fps */

    0x00, 0x00,                 /* Key frame rate in key frame/video frame units: only applicable

                                   to video streaming with adjustable compression parameters */

    0x00, 0x00,                 /* PFrame rate in PFrame / key frame units: only applicable to

                                   video streaming with adjustable compression parameters */

    0x00, 0x00,                 /* Compression quality control: only applicable to video streaming

                                   with adjustable compression parameters */

    0x00, 0x00,                 /* Window size for average bit rate: only applicable to video

                                   streaming with adjustable compression parameters */

    0x00, 0x00,                 /* Internal video streaming i/f latency in ms */

    0x00,0x60,0x09,0x00,   //z  /* Max video frame size in bytes */

    0x00, 0x40, 0x00, 0x00,      /* No. of bytes device can rx in single payload = 16 KB */

 

0x00,0x00,0x00,0x96,                 /* Max video frame size in bytes */

 

 

/* Configure the IO matrix for the device. */

    io_cfg.isDQ32Bit        = CyFalse;

0 Likes
1 Solution
Tomek
Level 1
Level 1
First solution authored First reply posted First question asked

Problem solved, i had problem on FPGA side. Thanks for your help.

Tom

View solution in original post

0 Likes
3 Replies