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Hi Everyone,
This is my first question.
I am currently using FX3 SuperSpeed Explorer Kit Schematic as reference for my design.
In the USB3 Connector part of circuit, I saw STDB_SSRX- is connected to net SS_RX_P and eventually pin A4 SSRXP.
Also STDB_SSRX+ is connected to net SS_RX_M and eventually pin A3 SSRXM.
I also checked the layout of the board. It matches the schematics.
Intuitively I would connect STDB_SSRX- to SS_RX_M and STDB_SSRX+ to SS_RX_P. I am very torn here about what should I connect to. But the Explorer Kit worked fine with the unexpected connection.
Can you help me to identify is this intentionally draw like this or this could be an error?
https://www.cypress.com/file/133841/download This is where I got my schematic from.
Thanks,
Solved! Go to Solution.
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Hello,
The polarity can be swapped on the USB 3.0 differential pairs. Polarity detection is done automatically by the USB 3.0 PHY during link training, as defined in the USB3.0 specification section 6.4.2, and does not require any additional changes to device firmware. Given the different USB connectors pinouts, the polarity inversion mechanism can be used to ensure that USB traces do not cross each other.
The same can be found in page 16 of the Application Note AN70707. The link to the same can be found below:
https://www.cypress.com/file/139936/download
Best Regards,
Jayakrishna
Jayakrishna
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Hello,
The polarity can be swapped on the USB 3.0 differential pairs. Polarity detection is done automatically by the USB 3.0 PHY during link training, as defined in the USB3.0 specification section 6.4.2, and does not require any additional changes to device firmware. Given the different USB connectors pinouts, the polarity inversion mechanism can be used to ensure that USB traces do not cross each other.
The same can be found in page 16 of the Application Note AN70707. The link to the same can be found below:
https://www.cypress.com/file/139936/download
Best Regards,
Jayakrishna
Jayakrishna