We use EP3_IN and EP3_Out to communicate with PC, and only transfer short packages(less than 512B);
FPGA read/write FX3's slave FIFO;
Pipe EP3_IN's timeout set to 0xFFFFFFFF;
Now we got a problem:
PC send data to EP3_Out works OK;
The problem is: PC cannot get data from EP3_IN; and only USB3.0 has this problem, 2.0 works OK;
We did a test:
FPGA send 5 packages per second, the first package can be written to FX3 successfully, but after the second write, FX3's FLAGA keeps LOW, as the attached chart shows;
We use FLAGA as *_wr_full signal, only write FX3 FIFO when it's HIGH;
Even if the first package write OK, PC cannot get it, and we see nothing from bus hound;
When this happens, IF we send a package to EP3_OUT, then pc can get the first package from EP3_IN;
We also tried:
Set EP3_IN's timeout policy to 1s, then PC can get a package per second, while FPGA trying to send one every 200ms;
We tried Win_USB driver and Cypress diver, got the same result;
Setting EP3_IN to bulk mode or interrupt mode from FX3 firmware, no change;
Forbid FX3 to enter low power mode, no change;
We can think of nothing to try now, any help will be appreciated!
