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USB Superspeed Peripherals

evgeniyBolnov
New Contributor II

Hi!

I have the following system: FPGA -> FX3(superSpeed explorer kit)->PC

I send counter from FPGA, but on pc i get shuffled data in multiples of packet size (1024)(1.png in attachments)

I try different parameters of DMA counts, DMA buffer size, but always the same

FX3 work on modified FIFO sync mode(from examples)

 

I'm not quite sure what other information to provide, so ask, I'll attach

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11 Replies
JayakrishnaT_76
Moderator
Moderator

Hello,

Please let us know the following to understand the issue better:

1. Which firmware is running on FX3? As per your description, I find that a modified version of Slave FIFO Sync from SDK examples is used. Please confirm if our understanding is correct or not. Also, what are the modifications made on the project?

2. How is the data acquired at the host side? Is it using a custom host application or using Control Center Application? Please try using Control Center Application if it was not used in your initial tests that showed the shuffle issue and let us know the results.

Best Regards,
Jayakrishna
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evgeniyBolnov
New Contributor II

1) Yes, i modified Slave FIFO from SDK.


#define CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT (0)

#define CY_FX_SLFIFO_DMA_BUF_COUNT (2)
#define CY_FX_SLFIFO_DMA_TX_SIZE (0)
#define CY_FX_SLFIFO_DMA_RX_SIZE (0) 
#define CY_FX_SLFIFO_THREAD_STACK (0x0400)
#define CY_FX_SLFIFO_THREAD_PRIORITY (8)

#define CY_FX_DMA_BUF_SIZE (49152)
#define CY_FX_EP_BURST_LENGTH (16)

epCfg.burstLen = CY_FX_EP_BURST_LENGTH

dmaCfg.size = CY_FX_DMA_BUF_SIZE;
const uint8_t CyFxUSB30DeviceDscr[] __attribute__ ((aligned (32))) =
{
0x12, /* Descriptor size */
CY_U3P_USB_DEVICE_DESCR, /* Device descriptor type */
0x00,0x03, /* USB 3.0 */
0x00, /* Device class */
0x00, /* Device sub-class */
0x00, /* Device protocol */
0x09, /* Maxpacket size for EP0 : 2^9 */
0xAD,0xDE, /* Vendor ID */
0xEF,0xBE, /* Product ID */
0x00,0x00, /* Device release number */
0x01, /* Manufacture string index */
0x02, /* Product string index */
0x00, /* Serial number string index */
0x01 /* Number of configurations */
};

2) I receive data with my app. I'm try CyAPI with C#, Qt with WinUSB and libusb(with change VID and PID in source code block #2. And everywhere I got the same result. Streamer application was not used due to the fact that reading is not implemented in the FPGA, since this is not needed, I only need to unload data from the FPGA

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Hemanth
Moderator
Moderator

Hi,

Have you changed GPIF state machine?

As Manual channel is used, the behavior mentioned (alternate 1024 packets being consecutive) is highly unlikely unless FPGA sends it that way.

So, can you please check if FPGA is sending one DMA buffer data with continuous values?

Regards,

Hemanth
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evgeniyBolnov
New Contributor II

No changes were made to states.

I am absolutely sure that the correct data is transmitted.

 

    logic [15:0] counter = 0;
    always @ (posedge clk, posedge reset)
    if (reset == 1)
    begin
        counter <= 0;
    end else
    begin
        counter <= counter + 1;
    end
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evgeniyBolnov
New Contributor II

1.png

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Hemanth
Moderator
Moderator

Hi,

Please try control center which is in below path and try

C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\bin

Regards,

Hemanth
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evgeniyBolnov
New Contributor II

Control center also shows incorrect data

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Hemanth
Moderator
Moderator

Hi,

I would suggest to check the data seen on the GPIF data bus using a logic analyzer (like salae logic) and try to compare with the data received. Do this for one DMA buffer.

Regards,

Hemanth
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evgeniyBolnov
New Contributor II

alas, I do not have a logic analyzer

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Hemanth
Moderator
Moderator

Hi,

Please try this: Send only one DMA buffer size data to FX3 from FPGA. Before committing that buffer in DMA callback, copy that buffer to another local buffer.

After exiting the dma callback, print the buffer contents on an UART terminal in your app thread. In this way you can see what data is received from the GPIF side.

Regards,

Hemanth
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evgeniyBolnov
New Contributor II

ah if I were a development specialist for fx3

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