Hi, I'm new to learn how USB works. So i bought SuperSpeed Explorer kit recently. It's my fault that i didn't RTFM well. But i need some help.
1. First, I want to connect 8-bit SRAM that i have. Here's what i did
I used this 8-bit SRAM. Here's reference doc and you can check this in detail.
https://pdf1.alldatasheet.com/datasheet-pdf/view/127524/HITACHI/HM6264ALP-10.html
I connected DQ(0 ~ 7) to I/O(1~8), DQ(8 ~ 15) to A (1 ~ 8).
Also i connected CTL0(DQ17) to !CS, CTL1(DQ18) to !WE, CTL2(DQ19) to !OE. J5 was disabled ofc.
And i fixed 32bit address to 8bit address via GPIF II Designer. This project is basically contained in "SRAM-FX3" Example, so i just fixed only that one. after that, i generated config header, Re-Built "SRAM-FX3" Firmware Example.
This was i got. I followed SRAM Example based on manual, but i couldn't figure out what is wrong.
Please let me know what i've missed.
2. As far as i understand, Transition Equation between state slots from State Machine could change GPIOs' state.
but i don't understand how it works. Comment said,
=================================
The fromState parameter can be used to ensure that the transition to toState
happens only when the state machine is in a well defined idle state. If a
valid state id (0 - 255) is passed as the fromState, the transition is only
allowed from that state index. If not, the state machine is immediately
switched to the toState.
=================================
"Valid state" should be in 0 ~ 255, but why did they use 256 in CyU3PGpifSMSwitch?
and it seems this sentence tells me that i'm wrong. does anyone explain this in detail? I'm really confused.
Many thanks.
Hello,
Thank you for your reply. I'm so glad to be helped. 🙂
1.
I just followed how FX3 internal SRAM is connected in Schematic.
I didn't check the timing tho. It was working with internal 32-bit SRAM mounted in FX3, So i think it should work with external 8-bit too unless i ruined wiring between 8-bit SRAM and FX3 kit.
2. Yes, i didn't change anything except Databus Length from 32-bit to 8-bit. that's all.
3. As i understood, it should work because it seems there are no differences between 32 bit and 8 bit except few changes.
So... CyU3PGpifSMSwitch() should be...
if FromState param is valid...
FromState -> (Some other States or not) -> ToState
if not... it goes immediately
FromState(Invalid) -> ToState
is this correct? Besides, I really don't get that Which APIs(or somethings) changes GPIOs' states. I suspect "CyU3PGpifSMSwitch()" does.
and comment said..
====================
The endState can be used to obtain a notification when the state machine
execution has reached the designated end state. Again, this functionality
is only valid if a valid endState value is passed in.
====================
it seems Endstate informs whether transition from FromSate to ToState goes well. But i think we just notice this from Return value. am i wrong? hm...
I'm so sorry but please correct me. My Eng is pretty short and even i tried some examples i cannot understand GPIF States easily ;(
Best Regards,
Gaogg
Hi AliAsgar, 🙂
1. I just followed Example, "SRAM Example" in para 3.6.2 from "SuperSpeed Explorer Kit User Guide". Since I used 8-bit SRAM, so i thought i should get only 256 bytes of sequential values. Because "1024_Count.hex" has 1024 bytes of sequential values.
2.
In "Transition Conditions" in para 7.4.3 from "EZ-USB FX3 Technical Reference", there should be an equation to change its state to other state. So Outputs which are connected to each GPIOs must be changed to satisfy equation. For example, Both CE and RE must be LOW to change from IDLE state to READ.
I thought there must be "something" to change GPIOs' states to HIGH or LOW but i cannot figure them out except "CyU3PGpifSMSwitch()" 😕
As you said,
"CyU3PGpifSMSwitch() is used to switch between any two states of a State machine, regardless of the transitions between them."
refers that i'm wrong.
State Machine detects changes in every clock, then what changes the GPIOs' states to satisfy states' equations? i think "DR_GPIO" Action may do that, but examples in GPIF II Designer does not show how it works.
Best Regards,
Gaogg
Hi AliAsgar,
Hmm..
Sorry. It seems i didn't clarify my question. so let me get it straight.
1. Goal
I want to connect external 8-bit SRAM via re-using reference project from
SuperSpeed Explorer Kit User Guide. You can check this project in para 3.6.2, "SRAM Example"
"SRAM Example" contains its GPIF II project, as manual describes.
so i used this project as the reference.
2. What i've done
I didn't change anything except Databus Length from 32-bit to 8-bit from the original one to figure out how it works on another interface.
and i did hardware wiring as hardware manual described from "SuperSpeed Explorer Kit Schematic" in "SuperSpeed Explorer Kit". You can check this in "SRAM Interface" section.
and I just followed Example, "SRAM Example" in para 3.6.2 from "SuperSpeed Explorer Kit User Guide".
3. What i got
I expected my result should be sequential 16-bit values. but it was not.
4. Additional Question i asked.
Both GPIF state maps are from the official Cypress Manuals. It makes me really confused.
Because i should swich GPIOs' states or give signals to peripherals to control them. But i felt that GPIF projects from Cypress kit do not describe well and how it works. That's why i tried "SRAM Example" with my external 8bit SRAM.
and that's why i asked like this,
=========================
State Machine detects changes in every clock, then what changes the GPIOs' states to satisfy states' equations? i think "DR_GPIO" Action may do that, but examples in GPIF II Designer does not show how it works.
=========================
So i do want the answer of this. :S
ofc, i used oscilloscope to catch signals like "OE", "WE", "CE". but some of them didn't work just what i expected. But i thought i should understand GPIF project first before finding the reason why.
Please feel free to answer. I will clarify what you can't understand as far as i can.
Best Regards,
Gaogg
