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Hello,
As the title states, I want to configure an SP605 board Over USB Using Cypress EZ-USB FX3.
I followed this tutorial http://www.cypress.com/documentation/application-notes/an84868-configuring-fpga-over-usb-using-cypre...
The same is for SP601 but they have equivalent pinout and same FPGA (Spartan-6) so I guessed it would work okay (using SP605 instead of SP601 in AN84868 - Configuring an FPGA over USB Using Cypress EZ-USB&#174... )
I have my out .bin file I created myself that is working perfectly with iMPACT platform (so I'm using that firmware for the FPGA).
I follow the instructions and get the following results:
After DONE LED is on, I click on configure. I see the INIT LED turning on for a second and then it stays on again permanently.
I didn't really find on the instructions when I am supposed to turn on the FPGA so I do it after downloading the firmware to the FX3.
I used the SP605 Hardware User Guide to know the equivalent leds/resistors to connect it to the SP605 board. The following images show my current set (PS: yellow cable is not used!).
Does anybody has any ideas of what it may be happening?
Solved! Go to Solution.
- Tags:
- fx3
- xilinx
- xilinx fpga
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Hello,
- The scope captures indicate that the CCLK is being output from the FPGA. Please ensure that you have configured the FPGA in Slave Serial configuration mode. This is done by setting the M[1:0] pins to 11.
- FX3 generates clock on the SCK pin (CCLK pin on FPGA) only when there is a data transfer. Please ensure that the firmware reaches the CyU3PSpiTransmitWords() API call for the clock to be generated. As I had mentioned in the previous interaction, comment out the below lines, disconnect the FPGA and then check for the clock on the SCK pin.
CyU3PGpioSimpleGetValue (FPGA_INIT_B, &xFpga_Init_B);
CyU3PGpioSimpleGetValue (FPGA_INIT_B, &xFpga_Init_B);
if (xFpga_Init_B)
{
glConfigDone = CyFalse;
return apiRetStatus;
}
CyU3PThreadSleep(10);
/* Release PROG_B line */
apiRetStatus |= CyU3PSpiSetSsnLine (CyTrue);
CyU3PThreadSleep(10); // Allow FPGA to startup
/* Check if FPGA is now ready by testing the FPGA_Init_B signal */
apiRetStatus |= CyU3PGpioSimpleGetValue (FPGA_INIT_B, &xFpga_Init_B);
if( (xFpga_Init_B != CyTrue) || (apiRetStatus != CY_U3P_SUCCESS) ){
return apiRetStatus;
}
Best regards,
Srinath S