[CYUSB3014-BZXC] SSRX lane to the USB3.0 connector connection

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Anonymous
Not applicable

Hi!

   

 

   

I have the following question to You: why in the FX3 Dev-Kit ( http://www.cypress.com/?rID=58321) high-speed lane SSRX P/N is connected to the USB3.0 connector in the reverse order? I mean that SSRX_M (FX3) goes to USB3.0 Connector PIN10 - SSRX_P (No.10: USB 3.0 signal receiving line (+)) and SSRX_P(FX3) goes to USB3.0 Connector PIN 9 SSRX_N (No.9: USB 3.0 signal receiving line (−)).

   

 

   

Best regards,

   

Krzysztof

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LiMa_282146
Level 4
Level 4
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Anonymous
Not applicable

 Thank you for a quick answer!

   

 

   

 

   

Best regards,

   

Krzysztof

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