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USB Superspeed Peripherals

Stevenlm57
New Contributor

Dear Yatheesh,

 

Sorry to bother you again.

After the last /RD signal problem was solved, no more underrun error.

But recently, all system combined test, I received error "No error : 18" from CY3014 uart port ,then, Xfer to FPGA failed.

Please kindly advise what is "No error : 18" ?

BR

Steven.

Steven Lin
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1 Solution
Rashi_Vatsa
Moderator
Moderator

Hello Steven,

It seems that in your case the XACT_ERROR, which is causing warm reset, occurs when data which high transition like 0x5555 and 0x AAAA is sent to the FX3.

To narrow down the problem, please try the following

Test 1) Modify the streamer application to send only 0x55 instead of 0xEF.

Please back up the default streamer application and do the above changes after copying the streamer to a new location.

Test 2) As you confirmed earlier that SDK 1.3.4 is being used in your application try using the library attached with this thread Solved: Re: FX3 Superspeed communication fails on link err... - Cypress Developer Community   and try using the modified streamer app (sending 0x55) or the custom app sending 0x55

Note: Please make a copy of the original library before placing the new one.

Also, let me know if the if you have hardware USB analyzer like Lecroy.

Regards,
Rashi

View solution in original post

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Rashi_Vatsa
Moderator
Moderator

Hello Steven,

The "No error : 18" is seen due to CYU3P_PIB_ERR_THR0_SCK_INACTIVE which is triggered when one of Thread 0 socket became inactive during transfer.

Please share the firmware used in your application and the UART debug prints. From the previous post it seems that you are using Slave FIFO interface. Please confirm. If yes, Please let me know if the default slave fifo state GPIF machine is being used or is it a custom state machine. Please probe the all interfacing signals and share the traces.

Regards,
Rashi
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Stevenlm57
New Contributor

Dear Rashi,

Hi, thanks for your reply

Yes,I am using Slave FIFO mode,stream out only. And firmware from AN65974,default GPIF state machine is being used,only change its flag pin assignment to fit my design. slavefifosync 32 bits. Signal /WR,/Pktend are tied to VCC. And /CS to GND. 
Stream out using thread 3

No any write action from Fpga to USB. (thread 0).
Why error came from Thread 0?

I have changed CY_FX_slfifo_DMA_buf_count -_p2u from 4 to 2,and u2p from 8 to 10.

Will this cause problem ?

I ever tested this config for 4days with Streamer without problem.

Before this “no error :18”  occurred,there were no any message from UART

I will provide firmware tomorrow

BR 

Steven

 

Steven Lin
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Stevenlm57
New Contributor

Dear Rashi,

By the way,my board ran as design in most of the time  

No error:18  occurred sporadically 

BR

Steven

Steven Lin
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Rashi_Vatsa
Moderator
Moderator

Hello Steven,

From the description I understand that the data transfer direction is from USB > PIB. From your previous thread, Error 997 is seen when the error occurs. Is that correct?

If yes, for transfers from USB > PIB this error occurs when the DMA buffers are not empty/available for USB producer socket to fill them.

The CYU3P_PIB_ERR_THR0_SCK_INACTIVE will occur when the FPGA/master drives the address lines A1:A0 = 00 to select the Thread0 instead of Thread 3.

Please probe the interfacing signals to check if at some point of time address lines are driven 0.

Please let me know if some changes were made (in FPGA code) after testing the firmware for 4 days

Regards,
Rashi
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Stevenlm57
New Contributor

Dear Rashi,

1.Transfer direction is from USB > PIB

2.Error 997 is seen when the error occurs

Above are all correct.

My A1,A0 are tied to VCC.

After test 4 days with attached .img file(please refer to attach slavefifosync.zip) and fpga firmware + PC Streamer without problems.

Then,no change anything within board,I connect this board to system(driving LVDS data to Inket head driver ) ,and PC side change to our PC application,then, almost all normal, but problem occurred spordically.

While problem occurred,PC side receive 997,and Chip side output UART message show "No error:18"

Please refer to the attached writeUSB.zip for our PC side sending data to USB related.

Our software engineer said he write all image data block(2MB) by block to queue,so, the transfer job is done by Cypress API.

Please help to check if any mistake.

Regarding to probe on A0,A1, in FPGA firmware ,they are = VCC.

One thing I found, in control center, if I click top right icon-reset device, UART also showed "No error:18".

Is that normal ? or it is a clue and connected to my problem ?

Best Regards

Steven.

 

Steven Lin
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Stevenlm57
New Contributor

Dear Rashi,

A0,A1's pcb trace are only 6mil and chip are BGA,it is really hard to probe it by external logic analyzer.

I can use Altera(my chip vendor) signal tapII to check if A0,A1 change or not while problem occurred even the are =VCC.

BR 

Steven.

 

Steven Lin
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Stevenlm57
New Contributor

Dear Rashi,

Regarding to

"One thing I found, in control center, if I click top right icon-reset device, UART also showed "No error:18".

I checked ,

1.While at boot mode : bootloader  ,reset device  ,no such problem.

2.After I upload my .img into RAM, then,reset device, "No error:18".

BR 

Steven.

 

Steven Lin
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Rashi_Vatsa
Moderator
Moderator

Hello Steven,

Please find the attached firmware with some added debug prints and made a small change to CyFxSlFifoApplnStop 

Program the firmware after building it to FX3 and test it with Cypress' streamer application, let me know if the problem is still seen and share the UART traces.

In your previous post you mentioned that the error is seen with the custom host application. Please confirm if the error is seen with Cypress Streamer application also

Regards,
Rashi
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Stevenlm57
New Contributor

Dear Rashi,

Thanks,I will try it and feedback soon.

In my 4 day's test with Streamer in before,no error at all.

BR

Steven.

 

Steven Lin
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Stevenlm57
New Contributor

Dear Rashi,

I am testing the img you provided with my board.

Looks like no problem so far.

Please refer to the attached log file(several minutes) and I will keep watching for hours and let you know the result then.

Please also refer to the attached control waveforms.

In before,my /RD control had probelms and caused RD UNDERRUN ERROR.

After modified as attached, no more underrun error.

BR

Steven.

 

 

 

Steven Lin
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Rashi_Vatsa
Moderator
Moderator

Hello Steven,

Please confirm if No error : 18 is not seen with the shared firmware when tested with custom host application

 

Regards,
Rashi
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Stevenlm57
New Contributor

Dear Rashi,

The test been run for 2 hours with Streamer.

Please refer to the attached log file.

There are no any failure in Streamer.

Do you take a look on my previous PC application code regarding to data transfer ?

Our engineer said it is different from Streamer(polling and send,block by block).

Our code is sending block into queue.

Is it OK to do so ?

We still see 997 today with our AP in different test platform.

I ask our engineer to change to same way as Streamer did,will see how .

BR

Steven.

Steven Lin
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Stevenlm57
New Contributor

Dear Rashi,

"Please confirm if No error : 18 is not seen with the shared firmware when tested with custom host application"

OK,I will

BR

Steven.

 

Steven Lin
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Stevenlm57
New Contributor

Dear Rashi,

After switched to custom host ap, I got error message very soon.

Please take a look and advise,thanks.

And,sorry,our engineer said ,after checked again,Streamer also use queue,his understanding was wrong.

BR

Steven.

 

Steven Lin
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Stevenlm57
New Contributor

Dear Rashi,

Our software mentioned : due to he is using Visual C++ 6.0, so, he could only use old CyAPI.lib(for FX2).

Our environment : Win7/32 bits.

In the test, seems all functions test are compatible so far.

Will this cause the problem we have now ?

BR 

Steven.

 

Steven Lin
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Rashi_Vatsa
Moderator
Moderator

Hello Steven,

As mentioned in this thread Solved: GPIF 8 bit Slave FIFO Multichannel Error of CYU3P_... - Cypress Developer Community  the reason of CYU3P_PIB_ERR_THR0_SCK_INACTIVE is due to the CY_U3P_USB_EVENT_RESET event triggered by the host.

From the logs you can see that CyFxSlFifoApplnStop  is called from CY_U3P_USB_EVENT_RESET event handler (CyFxSlFifoApplnUSBEventCB: EvType: 4, EvData: 1)

I have modified the the firmware and attached with the post. You can try using it with the custom host application and let me know the results. We would need avoid CY_U3P_USB_EVENT_RESET event from the host

As the problem is not seen with Streamer application and the CY_U3P_USB_EVENT_RESET event is triggered by the host when the custom host application is used, we would recommend to use the latest CyAPI.lib C++ library which can be found in the SDK 1.3.4

The latest CyAPI.lib should be used with Microsoft Visual studio 2008 and higher.

Regards,
Rashi
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Stevenlm57
New Contributor

Dear Rashi,

Thank you very much.

I will study/try all you mentioned and feedback soon.

Best Regards.

Steven.

 

 

Steven Lin
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Stevenlm57
New Contributor

Dear Rashi,

After installed newest img,result as below(also attached,more clear),

mData tracker: buffers receivedU2P: 29378, buffers sentU2P: 29370,buffers receivedP2U: 0, buffers sentP2U: 0
mData tracker: buffers receivedU2P: 30135, buffers sentU2P: 30135,buffers receivedP2U: 0, buffers sentP2U: 0
/CyFxSlFifoApplnUSBEventCB: EvType: 4, EvData: 1"
Entered CyFxSlFifoApplnStop
)
CyFxSlFifoApplnStop: GPIF Disabled
.
CyFxSlFifoApplnStop: Channel Reset done
0
CyFxSlFifoApplnStop: Channel destroy done

Exit CyFxSlFifoApplnStop
/CyFxSlFifoApplnUSBEventCB: EvType: 8, EvData: 0/CyFxSlFifoApplnUSBEventCB: EvType: 5, EvData: 1#
Entered CyFxSlFifoApplnStart
mData tracker: buffers receivedU2P: 30135, buffers sentU2P: 30135,buffers receivedP2U: 0, buffers sentP2U: 0
mData tracker: buffers receivedU2P: 30135, buffers sentU2P: 30135,buffers receivedP2U: 0, buffers sentP2U: 0

Does these logs give more clues ?

Best Regards.

Steven.

Steven Lin
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Stevenlm57
New Contributor

Dear Rashi,

There are seems many topic of “unexpected warm reset sent by host”

And seems  CyU3PUsbLPMDisable() is the solutions

Do you have any idea about this ?

BR

Steven

Steven Lin
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Rashi_Vatsa
Moderator
Moderator

Hello Steven,

The problem is seen only with the custom application so we recommend to use the latest CyAPI.lib for the host application. Please create a host application with the latest library in the SDK 1.3.4 and let me know if the problem still exists.

CyU3PUsbLPMDisable() is already been called in the firmware once the FX3 device enumerates successfully. 

Please let me know which SDK version are you using. Please check the build variable of the project.

To check the cause of reset I have added the code to get the USB logs. Please share the UART prints with the new firmware and also take the USB traces using software analyzer like Wireshark and share the .pcap file. Start the Wireshark capture before plugging the device.

Regards,
Rashi
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Stevenlm57
New Contributor

Dear Rashi,

Noted about LPM disable and thanks for your explanation.

Our engineer is working on using the latest CyAPI.lib for the host application with the SDK 1.3.4

Will feedback once it ready.

And I will use Wireshark to check immediately and feedback.

By the way,while I test with Steamer with custom board, all work fines,but if I change Packet per Xfer up to 256,then, I can see failures counting.

Below or equal 128 all all fine.

Our engineer said,we send 2MB to queue every time, I am thinking is it too big and trigger reset due to too many failed ?

May I ask,what is the Packet size in "Packet per Xfer", 1024 bytes or ? 8192 bytes?

Best Regards.

Steven.

 

 

 

 

Steven Lin
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Stevenlm57
New Contributor

Dear Rashi,

Our engineer is using 2010 Visual C++ .

"Please check the build variable of the project."

=>Can you tell what to check >

BR

Steven.

Steven Lin
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Stevenlm57
New Contributor

Dear Rashi,

While our software engineer is programming new custom AP, I installed Wireshark.

Now,I know Packet size in "Packet per Xfer" = burst length * 1024.

Please refer to the attached log file(UART and PNG) which including the point of warm reset with our old custom AP.

The WireShark  filter I use is usb.src=xxx and usb.dst=xxx.

In the PNG file,at the moment of PC issue reset,I did not see anything.

Maybe my setup was wrong ?

BR 

Steven.

Steven Lin
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Stevenlm57
New Contributor

Dear Rashi,

Our engineer successfully complied his code with SDK 1.3.4 by 2013 Visual C ,and your new .LIB of course.

After tested his custom ap today, looks like promising.

In before, warm reset from PC will be occurred very soon(within seconds,minutes).

With newest custom AP,so far, one hour passed,no problem.

At least,with newest .LIB(from Cypress SKD 1.3.4), the result is far different from before.

It is testing under UART/Wireshark logging now.

Will keep you posted.

Thanks.

BR 

Steven.

Steven Lin
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Rashi_Vatsa
Moderator
Moderator

Hello Steven,

Thank you for the update.

Glad to hear that with latest CyAPI.lib the application is working fine. Let us know if you face any problem while testing

Regards,
Rashi
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Stevenlm57
New Contributor

Dear Rashi,

After two days test : (PC AP(with new LIB) + custom board) x 2 sets, results are good without any problem.

Then,we connected(via LVDS cable) custom board to its downsteam- inkjet head driver ,and PC side, run ripping program(with new LIB),unfortunately, we got same reset UART message immediately as below,

[Mon Jan 25 08:52:14.430 2021] kData tracker: buffers receivedU2P: 1840, buffers sentU2P: 1840,buffers receivedP2U: 0, buffers sentP2U: 0
[Mon Jan 25 08:52:15.397 2021] kData tracker: buffers receivedU2P: 1840, buffers sentU2P: 1840,buffers receivedP2U: 0, buffers sentP2U: 0
[Mon Jan 25 08:52:16.380 2021] kData tracker: buffers receivedU2P: 1840, buffers sentU2P: 1840,buffers receivedP2U: 0, buffers sentP2U: 0
[Mon Jan 25 08:52:17.347 2021] kData tracker: buffers receivedU2P: 1848, buffers sentU2P: 1840,buffers receivedP2U: 0, buffers sentP2U: 0
[Mon Jan 25 08:52:18.096 2021] /CyFxSlFifoApplnUSBEventCB: EvType: 4, EvData: 1"
[Mon Jan 25 08:52:18.096 2021] Entered CyFxSlFifoApplnStop
[Mon Jan 25 08:52:18.096 2021] )
[Mon Jan 25 08:52:18.096 2021] CyFxSlFifoApplnStop: GPIF Disabled
[Mon Jan 25 08:52:18.096 2021] .
[Mon Jan 25 08:52:18.096 2021] CyFxSlFifoApplnStop: Channel Reset done
[Mon Jan 25 08:52:18.096 2021] 0
[Mon Jan 25 08:52:18.096 2021] CyFxSlFifoApplnStop: Channel destroy done
[Mon Jan 25 08:52:18.096 2021] 
[Mon Jan 25 08:52:18.096 2021] Exit CyFxSlFifoApplnStop
[Mon Jan 25 08:52:18.096 2021] /CyFxSlFifoApplnUSBEventCB: EvType: 8, EvData: 0/CyFxSlFifoApplnUSBEventCB: EvType: 5, EvData: 1#
[Mon Jan 25 08:52:18.430 2021] Entered CyFxSlFifoApplnStart
[Mon Jan 25 08:52:18.440 2021] kData tracker: buffers receivedU2P: 2058, buffers sentU2P: 2058,buffers receivedP2U: 0, buffers sentP2U: 0
[Mon Jan 25 08:52:20.284 2021] kData tracker: buffers receivedU2P: 2058, buffers sentU2P: 2058,buffers receivedP2U: 0, buffers sentP2U: 0
[Mon Jan 25 08:52:21.267 2021] kData tracker: buffers receivedU2P: 2058, buffers sentU2P: 2058,buffers receivedP2U: 0, buffers sentP2U: 0
[Mon Jan 25 08:52:22.234 2021] kData tracker: buffers receivedU2P: 2058, buffers sentU2P: 2058,buffers receivedP2U: 0, buffers sentP2U: 0

Would you please kindly advise under such kind conditions ,even with newest LIB,what possilbe cause to create such warm reset issue ?

Hardware noise ? Software ?

We are trying to reduce Packets per Xfer.

I did not attach WireShark this time(it did not record anything while reset occurred last time).

BR

Steven.

 

 

 

Steven Lin
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Rashi_Vatsa
Moderator
Moderator

Hello Steven,

We would need to know what happens on the USB bus.

I have added the code to get the USB logs. Please use this firmware with the new setup and also share the Wireshark. You can refer to this link for capturing the USB traces weblink

Regards,
Rashi
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Stevenlm57
New Contributor

Dear Rashi,

Thank you,I wil try and feedback soon.

BR

Steven.

Steven Lin
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Stevenlm57
New Contributor

Dear Rashi,

We are try to reproduce the warm reset again with Wireshark and your newest .img file for logging.

Due to it happen sporadically ,we have to wait for it.

Before that,I re-study my previous Wireshark log on 0121 I posted,I found the record inside of PNG file.

The fist error,it showed :

USB URB
[Source: 1.11.1]
[Destination: host]
USBPcap pseudoheader length: 27
IRP ID: 0xffffffff8bc81310
IRP USBD_STATUS: USBD_STATUS_XACT_ERROR (0xc0000011)
URB Function: URB_FUNCTION_BULK_OR_INTERRUPT_TRANSFER (0x0009)
IRP information: 0x01, Direction: PDO -> FDO
URB bus id: 1
Device address: 11
Endpoint: 0x01, Direction: OUT
URB transfer type: URB_BULK (0x03)
Packet Data Length: 0
[Request in: 25120]
[Time from request: 0.046800000 seconds]
[bInterfaceClass: Vendor Specific (0xff)]

Do you have any idea about it ?

BR

Steven.

Steven Lin
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Stevenlm57
New Contributor

Dear Rashi,

I got the error now.

Please check attached file and advise,thanks.

BR

Steven.

Steven Lin
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Rashi_Vatsa
Moderator
Moderator

Hello Steven,

I am not able to open the image file. Please share the .pcap Wireshark file

Regards,
Rashi
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Stevenlm57
New Contributor

Dear Rashi,

The file I uploaded is a ZIP file which includes LOG folder,and two files inside of it. 
one is UART log and Wireshark png file. 
I have download it here and confirmed it is correct. 
would you please try again ?

BR 

Steven

Steven Lin
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Stevenlm57
New Contributor

Dear Rashi,

I rename .png to .pcap and re-upload(Err-log-0125) again.

Today,after cross-check ,we found one thing pretty wired.

As you know well,

1We test our host AP(with newest cypress LIB) + custom board for days without problem at all.

2.Then,we connected it into our inkjet printing system,everything went well for all functions and many kind of image.But, if we print a specific function "pattern list" for 3 times,then, we got error code 997 ,and result as uploaded log.

We found such fixed error behavior pattern.

3.Then,our engineer fetched the memory page which generated by pattern list and save as a file,and send it to usb,also fail.

4.Then,repeated above step 3, but overwrite its contents by incremental long, no problem.

So,looks like some contents of transmission were treated as command or whatever ?

5.Then,we ran Cypress control center ,select its bulk out endpoint-data transfer,16384 bytes,checked pktmode, Transfer File-Out ,and select attached file(please unzip ErrBuf.zip), also failed at the 3rd times.

Does the transmission contents affect USB interface ?

BR

Steven.

 

Steven Lin
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Stevenlm57
New Contributor

Dear Rashi,

Follow to previous test result, I am thinking is it possible due to Steamer always send same content of data steam.And our Host AP ,in before,also only send incremental data, data variation are small.

So,I asked our engineer to send 0x55555555,0xaaaaaaaa long repeatedly,then,we got usb failed immediately.

Is it caused by power quality of CY3014 again ?

I will send you log afterward.

BR

Steven.

 

Steven Lin
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Stevenlm57
New Contributor

Dear Rashi,

I copy firmware from AN65974 slavefifo, and modified its GPIF data width from 32bits  to 16 bits.

And upload it into RAM.

All test passed.

0x55555555-0xaaaaaaaa  or 0xffffffff-0x00000000 repeartedly or our pattern list ,all runs fine so far.

With 32 bits data bus, above test failed.

With 16 bits data bus, no more error.

Do you have any idea such problem related to power 3.3V or 1.2V or others ?

BR

Steven.

Steven Lin
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Rashi_Vatsa
Moderator
Moderator

Hello Steven,

From the traces, XACT_ERROR is seen from the host (BULK_OUT). USBD_STATUS_XACT_ERROR is seen due to the host controller.

We have seen such issue before Solved: Why IN endpoint is always STALLED - Cypress Developer Community due to bad USB cable. Please try using a good certified USB cable and let me know the results.

With 32 bits data bus, above test failed.

>> The GPIF bus width shouldn't have affected the USB error.

Please let me know if the error is seen with streamer or control center with  inkjet printing system connected.

Please let me know to which FX3 block is inkjet printing system connected. Could you share the block diagram of your application?

Regards,
Rashi
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Stevenlm57
New Contributor

Dear Rashi,

Please refer to the attached file for FX3 Block.

Fx3 is located in this PMB board which is a data distributor for transmitting data through LVDS to head driver board.

OK,I will try different cable.

But thing are stranger here :

As informed before,if only test with Streamer and our PC AP(incremental long) with or without connected to system, all test passed with 32 bits.

But failed at data contents like 0x55555555-0xaaaaaaaa  or 0xffffffff-0x00000000 repeartedly.

While nothing change(same conditions) ,once I change GPIF  to 16 bits, all passed.

Seems 16 bits gave much wider tolerance.

From my understanding,GPIF 32 or 16 ,shouldn't have affected USB side,but it has now.

Why ?

BR

 

Steven Lin
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Rashi_Vatsa
Moderator
Moderator

Hello Steven,

Please let me know if there was any improvement on using a good USB cable.

 

Also, let me know what all changes were done to switch the GPIF bus width from 32 bit to 16 bits.

Can you please share the wireshark traces for both the cases

1) GPIF with - 32 bits, Host application: Streamer, Complete setup as shared block diagram

2) GPIF with - 16 bits, Host application: Streamer, Complete setup as shared block diagram

Regards,
Rashi
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Stevenlm57
New Contributor

Dear Rashi,

I have changed 4 types of different good cable,but it showed similar result-failed(warm reset by PC) at GPIF32 bits with fast data-switching pattern (0x55555555-0xaaaaaaaa).

Under GPIF32bits mode:

OK :Streamer and our host AP(new LIB, test pattern is long++).

NG:our host AP(new LIB, test pattern is 0x55555555-0xaaaaaaaa repeated).

Under GPIF16bits mode: All kind of test are passed.

I copied the firmware from AN65974 ,and modified GPIF to 16 bits,and in cyfxslfifosync.h

#define CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT (0)

and #define STREAM_IN_OUT 

Please refer to attached firmware ZIP file.

Also 2 files of Wireshark per your request.

One thing I found in WireShark : capture of Streamer : always one bulk_out from host to USB ,then,followed by one acknowledge from USB to host.

In our AP(we sent it to queue ,same as Streamer) ,about 6 bulk_out from host to USB ,then, followed by 6 acknowledges from USB to host together.

So far,16 bits runs fine at our whole system.

Please advise if you find anything.

Thanks.

BR

Steven Lin
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