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USB Superspeed Peripherals

New Contributor

Gents,

I have a firmware actually running on cypress RDK with a custom sensor.

On this sensor, I can select the number of CSI lanes I want to use to transmit video data.

I have observed a curious behavior when changing the number lines.

When I select 4 lanes the sensor is streaming properly and I do not observe any MIPI errors when checking CX3 error counters. If I switch to 1 lane the device is still streaming properly (I have adjusted FIFO delay to take into account the new configuration) but I observe that ctlErrCnt=3 for each frame captured all other counters are staying to 0.

What is the exact meaning of this "ctlErrCnt" field ?

The header file says "Control error (incorrect line state sequence) count", is it possible that the fact that the 3 lanes not used are not grounded could generate this error ?

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Moderator
Moderator

Hello,

Please refer to the 17th question of this KBA CX3 Hardware: Frequently Asked Questions - KBA91295

MIPI-CSI Protocol and Physical Layer Errors in CX3 (CYUSB3065 and CYUSB3064) – KBA228482

ctlErrCnt: This counter is incremented when escape mode is exited using the wrong sequence

Please confirm that the one data lane that you are using is the the first one (first data lane among the four) and not any one of the four lanes.

The data lanes used should follow the sequence too.

Regards,

Rashi

Regards,
Rashi

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8 Replies
Moderator
Moderator

Hello,

Please refer to the 17th question of this KBA CX3 Hardware: Frequently Asked Questions - KBA91295

MIPI-CSI Protocol and Physical Layer Errors in CX3 (CYUSB3065 and CYUSB3064) – KBA228482

ctlErrCnt: This counter is incremented when escape mode is exited using the wrong sequence

Please confirm that the one data lane that you are using is the the first one (first data lane among the four) and not any one of the four lanes.

The data lanes used should follow the sequence too.

Regards,

Rashi

Regards,
Rashi

View solution in original post

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New Contributor

Hi Rashi,

Thanks for your answer, I confirm that I am using the first data lane.

I am aware that unused lanes should be grounded but I am not observing such behavior when selecting 2 lanes for example.

What could be the consequence of this error ?

Regards,

Stéphane

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Moderator
Moderator

Hello Stéphane,

This error could be due to the MIPI transmitter. CX3 is just parsing data  sent from the transmitter. Can you try tuning the settings of transmitter and check?

Does this error occurs with every resolution? Can you share the Cx3 Configuration tool snapshot?

As you said it is streaming properly, it doesn't seem to bother much but we can try to avoid the error by knowing the reason.

Regards,

Rashi

Regards,
Rashi
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New Contributor

Rashi,

Here is my configuration :

cx3_config.png

I have already tried to increase FIFO delay but it has no effect.

I am going to check with multiple resolutions and blanking.

I will also check on transmitter side if I can play with CSI parameters.

Regards,

Stéphane

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Moderator
Moderator

Hello Stéphane,

The configuration seems fine.

Please let me know the PHY Time Delay Value in this configuration utility. You can try setting  the delay manually by calling this API CyU3PMipicsiSetPhyTimeDelay () in firmware. This is because the PHY Time Delay by default is 9 and as per your configuration it might have changed.

I have already tried to increase FIFO delay but it has no effect.

I am going to check with multiple resolutions and blanking.

I will also check on transmitter side if I can play with CSI parameters.

>> Let me know the results

Regards,

Rashi

Regards,
Rashi
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New Contributor

Rashi,

PHY Time delay is still 9 which means Ths settle=104.16ns with my clock settings. I am already using CyU3PMipicsiSetPhyTimeDelay function in my firmware to adjust PHY time delay according to desired Ths settle.

But, if I understand properly the architecture, PHY time delay has to be adjusted only when changing CSI RX LP <->HS clock it doesn't depends on the number of CSI lanes so it shouldn't be the root cause of my problem.

I have one additional question, what's the use of  CX3_BYTE_COUNT register in MIPI CSI-2 block ?

I have observed that I could give any hResolution value without observing effects on frame output, is it used for error monitoring ?

Regards,

Stéphane

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Moderator
Moderator

Hello Stéphane,

We actually don't  use CX3_BYTE_COUNT register so it can't be used for error monitoring.

Regards,

Rashi

Regards,
Rashi
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New Contributor

Changing resolution, blanking and CSI parameters has no effect ... I still get those "incorrect line state errors"  ... As it has no effect on streaming I will deal with them.

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