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USB Superspeed Peripherals

New Contributor II

They are thinking that interlaced design based on AN75779. And, they would like to confirm that the following specifications are feasible.
However, the project of AN75779 does not include the project created by CX3 Configuration.

[Spec]

MIPI : 148.5MHz 2lane

H-Active、  38.79us (38.79usx148.5MHz/4= 1440pix)

H-Blanking 24.77us    (=63.56us-38.79us)

V-Active odd/even:243/242

V-Blanking 20/21 (or 19.5/20.5?) ?

Frame Rate 30fps

THS-Prepare~100ns

THS-Zero       ~250ns

Q)

Why AN75779 did not include the CX3 configuration project, is there any reason for that?

Assuming that using only conformance is checked with CX3 Configuration, Is it feasible to apply the settings to cyfxuvcdscr.c directly to reflect the actual FW?


Best Regards

Arai

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Moderator
Moderator

In case the customer uses CX3, they can refer to OV5640 or AS0260 project in the FX3 SDK.

AN75779 is implemented for FX3.

Best regards,

Hirotaka Takayama

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Moderator
Moderator

In case the customer uses CX3, they can refer to OV5640 or AS0260 project in the FX3 SDK.

AN75779 is implemented for FX3.

Best regards,

Hirotaka Takayama

View solution in original post

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Moderator
Moderator

In addition, AN90369 is helpful for the beginner of CX3 as well as UVC.

https://www.cypress.com/documentation/application-notes/an90369-how-interface-mipi-csi-2-image-senso...

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