I know why my transfer is so slow. It's the polling interval while slave fifo doesn't have a complet packet.
In my case,I used interrupt transfer mode,ARM clocks datum into slave fifo in 14Mhz,but the USB is so fast that ARM hasn't write a complete packet when USB read out all available datum,so in some time there is no data for reading, then host would wait at least 1ms to read again, but during the interval data overflowed.
So the real working time of USB is small, the transfer is in slow speed also.
Another question: what is the polling intrval of isochronous transfer? and how about the bulk trransfer?
Isochronous and interrupt endpoint have guaranteed bandwidth. Based on the descriptor you can have the host request 3 packets per microframe i.e. 3 packets per 125us. Bulk does not have guaranteed bandwidth, if the bus is free bulk can provide significantly higher bandwidth than iso and interrupt but if the bus is not free then you might see drop in bandwidth. When you say overflow, are you implementing flow control (check full flag, empty flag etc) on the GPIF/Slave FIFO interface or not?
1,when there is no available packet in slave fifo,host would wait at least 1ms to reread the slave fifo. How much time would the host wait in isochrounous transfer and bulk transfer(bus is free)?
2,You say "Based on the descriptor you can have the host request 3 packets per microframe", Is the descriptor you mentioned the endpoint descriptor? Is it the Maximun packet size?(i.e. Maximun packet size=0x1400, there is 3packets, Maximun packet size=0x0400,there is one packets). Is this right?
3,I noticed the setxfersize in cyapi.chm, How would the change to the setxfersize affect the USB bus? I still don't understand the connotation of setxfersize .
Thank you! Anand.
2. Yep. descriptor only.
1. It depends on host scheduling. Say you configure descriptor saying 3 packets per microframe for iso, the host will request 3 packets within the microframe but doesn't really say when within that microframe (It will be 3 packets among the 16 packets in the microframe).
3. setxfersize configures the buffer allocated on the host controller driver. Say i configure it for 8k, when i trigger 16k transfer then after 8k fills up it will be transferred to driver or PC memory (just naming, not a real difference between the 2 actually) before it can get the remaining 8k and send it up. This transferring of 8k in the middle adds delay. This is the scenario where setxfersize comes into picture.
Thank you！Anand! I gradually understand the setxfersize.So if I want to transfer image data from camera CCD, I can set the Xfersize to be the size of a picture(i.e. 1024*768), when the size is multiple of 1024.is it right? Would the 1024*768 be too larege?