Good afternoon all,
In our project we are using one cypress board(56pin breakout board) with FPGA(spartan 3AN). We should interface cypress with FPGA board. For this we refered AN61345 and AN63620 application note from cypress. We downloaded sample code mentioned in AN61345 application note.
After we program cypress board by using slave.hex file and slavefifo.bit file to FPGA, How to see the output of this two code?
I suggest you to read the An61345 app note before going to use that
The *.bit file that is provided with app note is for spartan 6.If you are uisng other FPAG then you have build your own verilog or vhdl project as per the fpga you are using.
Where did you see the slavefifo.bit file in AN61345?is it your own *.bit file?
slavefifo.bitfile is not our code. First we trying to execute example programs given in the cypress website.
First we program the cypress board using slave.hex file as given by the cypress. Then we changed the ucf of the spartan 6 fpga to our respective board.
After loaded both file to both the device how we should check output? Which utility we have to use for seeing output?
We are using slave.hex and fx2lp_slavefifo2b_loopback_fpga_top.bit which is given in the cypress examples code.