I am designing a circuit that uses the CY7C68013A as a USB peripheral controller.
I have a question below.
1. Does the pull-up voltage of the FX2LP I2C line (SCL and SDA) work at about 2.6V?
What is suitable device for USB keyboard and mouse application
As far as I know, enCoRe II/III/V are target for low/full USB device.
However, I would like to know suitable device for USB keyboard and mouse application among the family.
Also, is there any reference for keyboard and mouse?
Jake MoonShow Less
I'm now using FPGA to generate data, write them in 68013 through the slave fifo interface, initial codes like these:
CPUCS = 0x12; // CLKSPD[1:0]=10, for 48MHz operation, output CLKOUT
REVCTL = 0x03; //ENH_PKD=1, out packets edit-able to the core
PINFLAGSAB = 0x00 | bmBIT7 | bmBIT6; // FLAGB - EP2FF
PINFLAGSAB |= bmBIT3; // FLAGA - EP2EF
PINFLAGSCD = 0x00 | bmBIT2; // FLAGC - EP2PF
IFCONFIG = 0xE3; // b'1110 0011, FIFO clock source out, 48M, clock output enabled; Slave FIFO mode.
EP1OUTCFG = 0xA0; //b1=1 Valid; [b5,b4]=1:0, bulk;
EP1INCFG = 0xA0;
//// out endpoints do not come up armed. Arm EP1OUT endpoints
EP1OUTBC = 0x40; // arm the EP1 OUT endpoint by writing to the byte count
EPIE |= bmBIT3; // Enable EP1 OUT Endpoint interrupts
EPIE |= bmBIT2; // Enable EP1 IN Endpoint interrupts
// EP4 and EP8 are not used in this implementation...
EP2CFG = 0x00 | bmBIT7 | bmBIT6 | bmBIT5 | bmBIT3; //in buffer 1024 bytes, 4x, bulk
EP6CFG &= 0x7F; //clear valid bit
EP4CFG &= 0x7F; //clear valid bit
EP8CFG &= 0x7F; //clear valid bit
FIFORESET = 0x80; // activate NAK-ALL to avoid race conditions
SYNCDELAY; // see TRM section 15.14
FIFORESET = 0x82; // reset, FIFO 2
FIFORESET = 0x00; // deactivate NAK-ALL
EP2FIFOCFG = 0x00; // AUTOOUT=0, WORDWIDE=1,
// core needs to see AUTOOUT=0 to AUTOOUT=1 switch to arm endp's
EP2FIFOCFG = bmBIT0|bmBIT3; // AUTOIN=1(bmBIT3), ZEROLENIN=1(bmBIT2), WORDWIDE=1(bmBIT0)
EP2AUTOINLENH = 0x00 | bmBIT2; // Packet Length = 1024bytes
Currently my design requires that I interface with Micron NAND flash (MT29F128G08A). We were thinking that your Y7C68023 / 24: EZ-USB® NX2LP™ USB 2.0 NAND Flash Controller would be an ideal part for the interface, however the Page Size is only 2K. The current Micron NAND requires a 8K page size.
Is there any options or other parts that you have that would allow access to a 8kPage size? Or is there an option to update the firmware in the Y7C68033 to allow us that large Page size ?Show Less
We are using CY7C65215-32LTX in our board as USB2UART bridge, we are using SCB0 only (to get 3M baud) and we face two issues:
a) We configured the system to 3Mbit (including RTS/CTS)but we are getting max baud rate of 2.1Mbit (single direction form UART to USB ) instead of 2.4Mbit (decreasing all the start stop bits etc from 3Mbit).
We are using updated Windows driver 184.108.40.206
b) Beside the baud rate issue if we are trying to send commands (USB to UART direction) during the 2.1Mbit data (describe in question#1) we are missing several bits .
We got random communication errors at low frequency. When the error occurs, WaitForXfer returns immediately before timeout and FinishDataXfer returns false. Sometimes, it can be recovered after retrying for several times. Sometimes, the USB peripheral works abnormally and it disappears and appears again in the Windows device manager for many times until restarting the software.
This error occurs after upgrading CYAPI.lib from 32bit to 64bit. We have tried the following two versions of SDK and both of them do not work well. But I do not know the SDK version which we used before upgrading, since the old CYAPI.lib has been used for many years and no one knows who downloaded it.
The USB chip we are using is 68013 and it works well before upgrading the SDK. The USB driver version is 220.127.116.11.
What should we do to prevent this error?
They have already created a board with CY7C65634-48AXCT and is using it as a DS2 port product.
However, they are thinking of using the same board and replacing it with CY7C65632-48AXCT instead of CY7C65634-48AXCT .However, it will be used as a DS2 port product like the current CY7C65634-48AXCT.
So, thay are going to use CY7C65632-48AXCT as a 2-port product.In this CASE, If they check the terminal table on the data sheet, it seems that VCC_A of Pin # 19 becomes an NC terminal and the power supply is reduced by one.
(Q) If V CC_A of Pin # 19 here uses only 2 ports (only 1 and 2 ports), is there any problem even if it is a floating terminal?
1) Please tell me the min and max limits of the input range as the input pin of GPIO and UART port.
As DC Input Voltage in FT232,
There is a description of -0.5 to (VCC + 0.5) [V],
There is only a description of VCCIO + 0.5 [V] in the max value of VGPIO.
How about the min value of the absolute maximum rating?
2) Table 5. GPIO DC Specification states as follows.
2. VIH must not exceed VCCIO + 0.2 V.
When VCCIO + 0.2 <VIN <VCCIO + 0.5, what is the impact on IC?
Since the Absolute Maximum Ratings are not exceeded, does it work properly?
Naoaki MorimotoShow Less
I was trying to use one of my device on Raspberry PI. This devices uses CyUsbSerial library to communicate to the PC. It works well with the windows version of the library.
Now when I port it to Rasperry PI using the SDK I found from here (https://www.cypress.com/documentation/software-and-drivers/usb-serial-software-development-kit)it fails to write to i2c.
I was able to see the divice using CyUSBSerialTestUtility. But I cannot write to I2c. I tried to detect the i2c bus status by running i2cdect, there is no devices connected there.
What am I missing here? Could CyUSBSerial work on an ARM machine? Thanks!Show Less
I'm using an FX2LP to receive images from a camera over an isochronous endpoint as AUTOIN. When I look at the USB packets I'm receiving, I'll receive one good packet with actual data, then 1 or more packets completely populated by "CD" in hex. I'm wondering if this value indicates something about the state of the FIFO buffer? The device transmits data correctly using Bulk transfers, but we need isochronous to handle the latency.
My endpoint description:
;; Endpoint 2 Descriptor, high speed
db DSCR_ENDPNT_LEN ;; Descriptor length
db DSCR_ENDPNT ;; Descriptor type
db 82H ;; Bit 7: 1 = in, 0 = out, bits 3..0 = endpoint #
db ET_ISO ;; Endpoint type
db 00H ;; Maximum packet size, LSB
db 14H ;; Maximum packet size, MSB
db 01H ;; Polling interval in milliseconds
After the image sensor is enabled, I arm the FIFO as below:
FIFORESET = 0x80; // NAK all transfers to avoid race conditions
FIFORESET = 0x82; // Reset EP2 flags & bytes counts to default
FIFORESET = 0x00; // Restore normal operation
EP2FIFOCFG = 0x08; // "1000" = 3:Auto commit IN packets, 2: do not allow zero length IN packets, 0: bytewide
EP4FIFOCFG = 0x00;
EP6FIFOCFG = 0x00;
EP8FIFOCFG = 0x00;
EP0BCH = 0;
EP0BCL = 0;