USB low-full-high speed peripherals Forum Discussions
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Hello, please tell me that model: CY7C68013A-56LFXI has been discontinued
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Is there an alternative model recommended?
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Show LessWe use CYUSB3014 as a USB3.0 data transfer solution, which is currently in the trial production stage. Occasionally during the trial production, USB3.0 is not recognized after the board is connected to the PC.
The firmware uses the official SlaveFifoSync firmware. After the board in question is powered on and the firmware is loaded from the I2C ROM, the corresponding FX3 device can be seen in the Windows Device Manager as follows
However, at this time, the USB port cannot be recognized in the cypress control center, as shown below. The self-developed PC software can not read the port at this time.
At this point in the power state to keep re-plugging the USB3.0 cable, Windows Device Manager will pop up unrecognized USB devices, as follows
Can you tell me whether this problem is a hardware failure or a firmware failure and how to troubleshoot and solve it.
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Show LessHi, Support.
I obtained a file named "files for command line utility.zip " from the forum, which includes a method for generating firmware and programming for CY7C65211. In the Decryption Utility directory, using the tool provided, I managed to generate default_CY7C65213-32LTXI_decrypted.cyusbd
from default_CY7C65213-32LTXI.cyusb
.However, after programming this firmware into the CY7C65211 device under Linux, the device can no longer be recognized by Linux.
My goal is to enable USB to SPI functionality support on the CY7C65211 chip. I am unable to generate the corresponding firmware version on Windows in my current situation. Could you provide me with a .cyusb
file that supports USB to SPI functionality for the CY7C65211 chip? Thank you very much.
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Show LessMy application is: the upper computer cycle read USB data, the lower computer is FPGA + CY68013 to send USB data, FPGA to determine the CY68013 write full flag, non-full write operation, otherwise do not carry out any operation, waiting for the non-full flag in the original place, now found that the upper computer has been in the read, but the FPGA reads the 68013 has been full, if a certain place 68013 write full, FPGA will not write and the host computer has been reading, 68013 will always be non-full to ah, why has it been full, the following is my capture of the FPGA waveform, from flagd to 0, it will never become high! At the beginning, it will run normally for a while, and then it is an error.
The following is the program of the upper computer, read all the time in the loop, one problem is that the return value status of the read may be 0, what may be the reason for this, if regardless of the return value of the read, has been running like this whether it is effective (is it not after an error, it will not really read the data again), 68013 set to transfer 512 bytes in a block?
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Show Lesscyusb3014, after plugging into the usb2.0 interface, which functions in cyapi.lib are called by the software to complete the initialization, read and write operations?
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Show Lesssmartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/%E4%BD%8E%E9%80%9F-%E5%85%A8%E9%80%9F-%E9%AB%98%E9%80%9F-USB-%E5%A4%96%E8%AE%BE/CY7C68013A%E7%9A%84USB%E7%9C%BC%E5%9B%BE%E6%B5%8B%E8%AF%95/td-p/469451
Show LessFrom a linux system, I want to read back the configured program image from a CYC65215 part and check that its CRC is correct -- assuming it has an appended CRC. Does the image have a CRC? Is the CRC generated using a known algorithm with a standard polynomial? If so, which polynomial?
Show LessRefer to fx3 sdk 1.3.5 routine uac_examples to modify fx3 to usb Speakers, the computer recognizes the device, but the computer can't play the audio properly and the fx3 can't receive the audio data. May I ask what is the problem? Is there any related routines I can refer to? #EZ-USB FX3
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