USB low-full-high speed peripherals Forum Discussions

Hello Guys,

                  please find attachment below..,

                  I can`t flash firmware EEPROM on Fx2lp..

there is OEM usb hub board that use IC CY7C65640-LFC  to be usb controller and we found usb intermittent  lost communication  for many time then take board out to check don't see any component bad. looking datasheet of CY7C65640-LFCX-E there is many improvement. can anyone share idea for what possible root cause for lost communication from CY7C65640-LFC  and how to fix to improve reliability.

Hello,

I have problem when migrating design with USBFS component, e.g. from CY7C64215 to CY7C6315. I have simple USB HID device

When insert USBFS component you need to run USB wizard and manually setup all settings.

I know that I can only import in USB Wizard "Import HID Report Template"

So I am asking if it is possible to copy USBFS component settings & descriptors from "another project". Is there some possibilities to do this in another way ?

Thanks in advance

Radim

We use a FX2LP to stream data form a camera to USB. GPIF is used to crop some data out of the stream. It's running in an continuos FIFO read mode until the GPIF is stopped by GPIFABORT. But after stopping it, the GPIF cannot be restarted. There are no data coming into the fifo after GPIFABORT and trying to restart. GPIF_DONE is set to one after writing GPIFABORT and it's set to 0 again after restarting the GPIF. But there are no data coming in after restart.

Even after a reset of the fx2lp, the GPIF isn't working anymore. Only powering off and on again can put it to work again.

Can someone help with this problem?

code used to stop and restart:

/**
    set gpif crop parameters:
**/ 
void vcmd_CROP_PAR(void)
{
    // disable interrupt while changing gpif
    EA  = 0;
    
    // stop GPIF
    GPIFABORT=0xFF;
    SYNCDELAY;
    // wait until idle
    while (!(GPIFTRIG & 0x80))
    {
        SYNCDELAY;
    }
    
    // set new GPIF data
    //gpifConfig.WaveData[0x41]=SETUPDAT[2];    
    // initialize gpif
    //GpifInit();
    
    // launch GPIF FIFO Read transaction to EP2IN
    GPIFTRIG = GPIFTRIGRD | GPIF_EP2; 
    // re-enable interrupt
    EA = 1;
}

// Called once at startup
void TD_Init(void)
{
  xdata int serial;
  // Enable remote-wakeup
  Rwuen = TRUE;
  // 48 MHz CPU clock
  CLOCK48MHZ;
  // stretch value = 0 for fast memory access, T2M=0, Timer 2 is clocked by CLK/12
  CKCON=0;
  SYNCDELAY;
  // REVCTL.0 and REVCTL.1 to set to 1
  REVCTL = 0x03;
  // use dual autopointer feature...
  AUTOPTRSETUP=0x07;
  SYNCDELAY;
  // reset endpoint FIFOs
  // FIFO for debug output
  RESETFIFO(0x01);
  // fifo for data output (image data and inertial sensor data)
  RESETFIFO(0x02);
  // enable extern INT1#, INT#0;
  // INT#0: end of frame signal from image sensor
  // INT#1: new data from inertial sensor
  PORTACFG=0x03;
  SYNCDELAY;
  // detect Interrupt 0,1 on falling edge
  TCON |= 0x05;
  SYNCDELAY;
  // SLWR and SLOE is configured as active HIGH
  // SLWR is used to detect line valid signal from image sensor
  FIFOPINPOLAR = 0x14;
  SYNCDELAY;
  // EP2: Valid, DIR in, Type SO, Size 1024 Bytes, Quad Buffered
  // EP2 is used to transfer image data and inertial data
  EP2CFG = 0xD8;
  SYNCDELAY;
  // EP1 in: Bulk
  // EP1 is used for transmitting debug messages
  EP1INCFG =0x82;
  SYNCDELAY;
  // switch off all other endpoints
  EP1OUTCFG &=0x7F;
  SYNCDELAY;
  EP4CFG &=0x7F;
  SYNCDELAY;
  EP6CFG &=0x7F;
  SYNCDELAY;
  EP8CFG &=0x7F;
  SYNCDELAY;
  // This register sets the number of Isoc packets to send per
  // uFrame.  This register is only valid in high speed.
  EP2ISOINPKTS = 0x83;
  SYNCDELAY;
  // EP2 FIFO: AUTO IN, NO Zero Length Packets, 8- bit Wide
  EP2FIFOCFG = bmAUTOIN;
  SYNCDELAY;
  // switch off all other FIFOs
  EP4FIFOCFG=0;
  SYNCDELAY;
  EP6FIFOCFG=0;
  SYNCDELAY;
  EP8FIFOCFG=0;
  SYNCDELAY;
  // EP2: Auto-commit 1024-byte packets
  EP2AUTOINLENH = 0x04;
  SYNCDELAY;
  EP2AUTOINLENL = 0x00;
  SYNCDELAY;
  // enable PORTD general functions by writing IFCONFIG after WORDWIDE bits in EPxFIFOCFG are all cleared
  // internal ifclk used: slave FIFO enabled, IFCLK inverted, internal IFCLK 48Mhz
  IFCONFIG=0xD3;
  SYNCDELAY;
  // FLAGA=PF, FLAGB=FF, FLAGC=EF, FLAGD=EP2PF (Actual FIFO is selected by FIFOADR[0,1] pins)
  // Slave FIFO FLAGA and FLAGB Pin Configuration
  PINFLAGSAB = 0x00;
  SYNCDELAY;
  // Slave FIFO FLAGC and FLAGD Pin Configuration
  PINFLAGSCD = 0x00;
  SYNCDELAY;
  // Endpoint 2 / slave FIFO Programmable Flag H
  //  Flag A active on 3 Buffers filled and 4th buffer >0
  //    b7 DECIS = 1
  //    b6 PKSTAT = 0
  //    b5..b3 PKTS = 3
  //    b2 = 0
  //    b1..b0 PFC9..PFC8 = 0
  EP2FIFOPFH=0x98;
  SYNCDELAY;
  // b7..b0 PFC7..PFC0 = 0
  EP2FIFOPFL=0x00;
  SYNCDELAY;
  // set SPI CLK to 0
  SPI_CLK=0;
  // deselect Python
  PYTHON_SELECT=1;
  // reset Python trigger
  PYTHON_TRIGGER0=0;
  // deselect IMU
  MPU_SELECT=1;
  // switch leds on
  //IRLED=1;
  // activcate Python
  PYTHON_RESET=1;
  // set PD for output: PD0,PD2,PD3,PD5,PD6,PD7 write
  OED = 0xED;
  WAKEUPCS=0x05;
  // set PA for output: PA3,PA7 write
  OEA=0x88;
  // trigger off
  PYTHON_TRIGGER0=0;
  // configure inertial sensor
  MPUinit();
  // timer 0: two 8 bit counters, timer 1 16 bit counter, timer 1 is started by mode selection
  // eof signal from image sensor triggers timer 0.
  // Timer 0 interrupt sends USB data (image and inertial values)
  // timer 1 is used to generate an internal 4Mhz timebase
  // timer1 is reset at each microframe
  TMOD=0x13;
  // clear timer 0 overflow flag
  TF0=0;
  // enable external interrupt 0,1, timer0
  // INT0: frame valid 0x01
  // INT1: inertial sensor interrupt
  // timer 0: delay after frame end
  IE=0x07;
  // enable external interrupt 5,
  // it's used to do sof tasks indirectly ( especially timer snapshot):
  // ISR_Sof triggers ISR_EXTR5
  EIE|=0x08;
  // INT0 priority
  PX0=1;
  // INT1 priority
  PX1=1;
  // INT 5 priority
  EIP |= 0x08;
  // USB interrupt priority
  PUSB=1;
  // enable USB autovector (AV2), FIFO autovector (AV4), INT4 source is FIFO
  INTSETUP = (bmAV2EN | bmAV4EN | INT4IN);
  // clear sof irq
  USBIRQ = bmSOF;
  // enable sof int
  USBIE |= bmSOF;
  // enable i2c
  EZUSB_InitI2C();
  // Enable Global Interrupt
  EA  = 1;
  // initialize gpif
  GpifInit();
  // initialize gecko
  geckoInit();
  // test output
  serial=SERIALNUM
  ;  // ; is in the next line intentionally, to detect it with dos command findstr
  PRINTF("Welcome to EasyCam2 %4d\r\n",serial);
  // start gpif by triggering fifo read waveform
  // launch GPIF FIFO Read transaction to EP2IN
  GPIFTRIG = GPIFTRIGRD | GPIF_EP2;
}

attached are the gpif configuration files

Hello

I need the driver for EZ-USB AN-2131QC for use on windows 7 32 bit. They could pass the driver.

thank you

Hi,

The test lab we are using to perform WHQL testing on our new devices is having issues with three OS's.  Please provide suggestions that we can pass along to our test lab vendor.

Cypress chip:

CY7C68013A-56LTXC

Cypress host integration and driver package:

EX-USB FX3 SDK 1.3 and we are using the latest 1.2.3.20 of your USB driver binaries (cyusb3.sys). Driver packages are unsigned and customized for our VID/PIDs, cat file etc. and are fully tested on our machines with our devices and software (not WHQL tested).  When test lab provides us with passing packages, I will sign with our EV Code signing cert and submit to Microsoft.  [Note – I did this back in 2011 with the same chip on earlier products using older cyusb.sys and EXUSB for Win 7 x86/x64 and XPj and can be installed silently on Win 10 x86/x64.]

Transport:

USB 2.0

Test Lab WHQL testing results:

PASS: Win 10 x64

PASS: Win 7 x86

PASS: Win 7 x64

FAIL: Win 10 x86 – more info below

CANNOT INSTALL UNSIGNED DRIVERS: Win 8.1 x86/x64 – more info below

Win 10 x86: The test lab had issues with the timing of the HLK software and the timing of when the device being tested completes the firmware update and remunerates to a “post” enum device.  The test script is reading the devices PIDs before the firmware update completes and re-numerates – test is targeting the 0x0010 and 0x0012 instead of the post-enum 0x0011 and 0x0013.  The test lab also provided this info:  I think it can be worked around with a 5m cable and a Hub.  M210 and V310-10 should be connected behind the Hub.  It may be related to xHCI host reset timing of the test bed PC.  Intel xHCI driver bundled to the W10 x86 distribution may be set to send too short Host reset signal for M210 and V310-10.

Beyond that stage, two (2) kinds of fail were found in DF-PNP Cancel Remove Device Test, Run Test:

    1. WDTF_PNP: EDT filter is not installed on target device HRESULT=0

    2. WTDF_TARGETS: WDTF.ConcurrentIO.1 SetTarget() ERROR: CWDTFConcurrentIOImpl::SetTarget() EDT filter is not installed on target device HRESULT=0x80004005 HRESULT=0x80004005

Win 8.1 x86 and 8.1 x64: Test lab can’t install unsigned drivers on their Win 8.1 test PCs.  We had no issues on our Win 8.1 PCs following these steps, but the test lab can’t install.

1. Click or tap the Start button, and then the Power button. Hold down the Shift key when you select Restart.
2. In the resulting, full-screen menu, select Troubleshoot>Advanced options>Startup Settings
3. In the Startup Settings screen, tap the Restart button. The PC will reboot, and bring you to a Startup Settings screen
4. Use the arrow keys on your keyboard to select what you want.  You may need to use the number keys to select.

The test lab also tried bcdedit -set TESTSIGNING ON and rebooted, but they are unable to install the driver.

They get the following unknown device error

Thanks,

Rich

I've read the discussion of programming a CY7C63813 (in-circuit) using the MiniProg and the 5-pin to USB adapter.  I am wondering if I can use the CY3215A-DK as a platform to program a CY7C63823 in-circuit.  This would require a custom cable that I could fabricate, taking the signals from the POD 16-pin connector off the CY3215A and terminating into a USB plug.  Not totally sure of the wiring requirements, so would like to confirm the wiring hookup, plus any required pullups or pulldowns on other signals off the POD.

In addition, if this is technically feasible, then will the PSOC programmer software properly detect the appropriate MCU?  Currently, with the latest downloaded updates, the PSOC Programmer does not have a device selection option for the CY7C63823.

Thanks in advance!

RM

Hi,

My FX3 is configured for i2c boot via PMODE pins, and there are 2 EEPROMs connected on the i2c bus. Each EEPROM is assigned an address in hardware. My firmware is only stored on one of those EEPROMs, the other contains some application data.

Will the bootloader know which EEPROM to boot from? Current guesses:

  - Is there a setting that tells the bootloader which address to boot from?

  - Does the bootloader try all the EEPROMs till it finds one with correct boot header?

Thanks!