Questons in < ez_usb_fx2_gpif_primer___an1197_12.pdf>?

Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

cross mob
Anonymous
Not applicable

I do not understand a problem in < ez_usb_fx2_gpif_primer___an1197_12.pdf>.

   

At page 32,

   

TD_Poll()
Code that handles USB OUT Transfers
if( GPIFTRIG & 0x80 ) // if GPIF interface IDLE
{  
  if ( ! ( EP24FIFOFLGS & 0x02 ) ) // if there's a packet in the peripheral domain for EP2
  {
    if ( EXTFIFONOTFULL ) // if the external FIFO is not full
    { 
      if(enum_high_speed)
      {
        SYNCDELAY;   
        GPIFTCB1 = 0x01; // setup transaction count (512 bytes/2 for word wide -> 0x0100)
        SYNCDELAY;
        GPIFTCB0 = 0x00;
        SYNCDELAY;
      }
      else
      {
        SYNCDELAY;
        GPIFTCB1 = 0x00; // setup transaction count (64 bytes/2 for word wide -> 0x20)
        SYNCDELAY;
        GPIFTCB0 = 0x20;
        SYNCDELAY;
      }
      Setup_FLOWSTATE_Write(); // setup FLOWSTATE registers for FIFO Write operation
      SYNCDELAY;
      GPIFTRIG = GPIF_EP2;     // launch GPIF FIFO WRITE Transaction from EP2 FIFO
      SYNCDELAY;
  
      while( !( GPIFTRIG & 0x80 ) ) // poll GPIFTRIG.7 GPIF Done bit
      {
        ;
      }
      SYNCDELAY;
    }
  }
}

   

The first thing the OUT handling code does is it checks to see if the GPIF is IDLE. If so, it checks to see if there is at least one packet in the peripheral domain for EP2. Since EP2 is placed into auto mode, the firmware does not need to check if the host sent a USB packet. The USB packets are automatically committed to be used by the GPIF engine. Therefore, the firmware’s job is to check if at least one packet has been committed to the peripheral domain.
Then, if the external FIFO is not full, the TC value is set up for word-wide operation. The TC value is a 32-bit register field, but for this application only the lower 16-bit fields are necessary. Since each GPIF FIFO Write transaction sends 512 bytes to the external FIFO over a 16-bit interface, the number of transactions is always half the number of bytes actually contained within the endpoint buffer. The appropriate TC value is set up for either high-speed (256) or full-speed (32) operation.
The appropriate flow state registers are then set up for the FIFO Write transaction, and a write to the GPIFTRIG register with the appropriate bits triggers the transaction from EP2OUT. The code then waits for the transaction to complete before exiting out of the “if” nest.
 

   

I don't  understand these sentens:"The USB packets are automatically committed to be used by the GPIF engine. Therefore, the firmware’s job is to check if at least one packet has been committed to the peripheral domain."
 

   

What will happen if I send 10 words(not equal to 512 Bytes) to the EP2.

   

I found if I send 10 words to EP2,I cannot send my vendor requet to ez-usb,why??

0 Likes
3 Replies
Anonymous
Not applicable

Hi! 

   

    A similar thread has been posted at http://www.keil.com/forum/docs/thread13370.asp.

   

I do face similar problem to trigger the GPIF write waveform. All instructions,but GPIFTRIG=GPIF_EP2, works

   

What is causing the GPIF write operation to hang?

0 Likes
Anonymous
Not applicable
        I have the same problem, and I fix it as below: 1. My PC Host software (write self) send data length before GPIF transfer. 2. Firmware receive the length. So you can set your gpif TC as: GPIFTCB3 = DataLens[0]; SYNCDELAY; GPIFTCB2 = DataLens[1]; SYNCDELAY; GPIFTCB1 = DataLens[2]; SYNCDELAY; GPIFTCB0 = DataLens[3]; SYNCDELAY; NOTE: DataLens[4] stored data length. As the code before, I can finished my GPIF write successfully! But I found the transfer is not stable. Can anyone give some ideas?   
0 Likes
Anonymous
Not applicable

If you send only 10 bytes, since you have specified a txn count of 256, the gpif controller would keep waiting for the rest 246 bytes. In this interval, the vendor commands will not be served. You need to complete the full transfer before you can do that again.

0 Likes