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Hi,
We're using your CY7C65215 part to go from USB to I2C in master mode. We have found a strange behaviour on a read from from your device on the bus. On the SDA line, the CY7C65215 is pulling unexpectedly the bus low on a falling edge of the clock making the voltage dropping lower than -500mV with is the limit of the input buffer of the other component on the bus (see screen capture, blue signal). How come the CY7C65215 is pulling the bus low?
Thanks in advance,
Kind regards,
Xavier
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USB Hosts Hubs Transceivers
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Hi,
Schematic looks fine from CY7C65215's side.
The negative spike is most probably not created by USB-Serial. If possible can you please connect some other I2C slave device and check if this negative spike is seen even then.
Are both USB-Serial and the slave devices share a common VDD supply and GND?
Pranava
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Hi,
Is it possible to share the schematic of the board?
Can you please cross-check if USB-Serial Hardware Design Schematic Checklist are met - https://community.cypress.com/t5/Knowledge-Base-Articles/USB-Serial-Hardware-Design-Schematic-Checkl...
Also is can you please disconnect other devices on the I2C bus and check if this issue still persists?
Pranava
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Hi Pravana, thanks for your answer. Here is the schematic of the board
The other end of the bus is to this buffer on a second board with cordon between them. Pullups resistors are now 10k as U4 as accelerator capabilities.
Our configuration is like this
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Hi,
Schematic looks fine from CY7C65215's side.
The negative spike is most probably not created by USB-Serial. If possible can you please connect some other I2C slave device and check if this negative spike is seen even then.
Are both USB-Serial and the slave devices share a common VDD supply and GND?
Pranava