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USB Low-Full-High Speed Peripherals

Anonymous
Not applicable

I am currently using the c65215 on the CyUSB3Kit-003 to access the FX3, but have some questions regarding reset control:

The JTAG interface provides vendor commands for Read/Write/Enable and Disable. Does any of these affect the state of TRST#/pin 9?

Also, I would like to wire GPIO_15 (pin 10) to the RESET# line of the FX3, to be able to control reset from the C65215. This would allow better integration with OpenOCD which somewhat requires control of both SRST and TRST for reliable startup. Currently, I have to emulate a "reset halt" by keeping the Reset button pressed and entering a halt at the prompt.

AFAICS it should be possible to control the GPIO from openocd (given the right vendor requests are added to the openjtag driver).

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