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I've tried setting the CPU clock to 12 MHz, 24 MHz, and 48 MHz. The debugger stops if the clock is not 48 MHz. I'm wondering if it must be 48 MHz for the COM port to function properly for the debugger? I'm changing the clock in TD_INIT. The reason I'm trying lower clock rates is because I see 500 mV pk-pk noise on the 3.3V supply when running the GPIF at 48 MHz and the Clkout at 48 MHz. I wanted to see if the board was more stable at a slower rate? Also at 48 MHz I never get EP2EF to go low when viewing EP2FIFOFLGs or EP24FIFOFLGs, and occasionally see EP2EF go low on EP2CS, and miss it once in a while on EP2468STAT. I have not yet tried the slower GPIF clock rate. Hardware is Cy3684/3674 EZ-USB Advanced Development Board with CY7C68013A. SW is Keil uVision2 V2.38j. CyConsole is USB Console V188.8.131.52
Hi, If this is an urgent issue, you may be interested in getting technical support from Cypress. If you create a technical support case on this issue, it will be answered soon from some Cypress Engineer. To create a case, go to Support Tab on the top of the page, then technical support-- > Create a case. Then submit a technical support case. Best regards, Sachin
Thanks; I'll submit a case once I try a few more things out. I've gotten a simple GPIF to start, now I don't "see" it stopping. Even though the gpif just cycles output with no RDY inputs until a TC is reached. I did see the count value go to zero but no Done Flag. Also wondering if the first output value is the first byte sent, or if data change must go off first.