I have built a FPGA project to test the slave FIFO, I found that when FIFO size is set to 512 or 1024, the FF flag wil go active when 512 or 1024 words are written into the FIFO, it seems there is no relationship between 2x, 3x, or 4x of FIFO depth, is it the truth? why?
Yes, it's CY7C68013A. I also found that when EP2 was set to be size=512, buffering=2x, first I use console tool to read fifo until empty, then trigger to write 512 word into fifo, again to read fifo using console tool, I can read back 1024 word until console tool can't read. I guess this is not the expected behavior, but why? What's wrong?