Hi,Sir!
My code is bigger than 16K bytes, I select 64K bytes I2C Eprom and also attach one 64K bytes parallel SRAM as external Code(EA = 0) . the following description is from TRM:
The Main RAM is accessible both as program and data memory, just as in the 56- and 100-pin
FX2.
To avoid conflict with the Main RAM, the pins which control access to off-chip memory (the RD,
WR, CS, OE, and PSEN pins) are inactive whenever the FX2 accesses addresses 0x0000-
0x1FFF. This allows a 64K memory chip (data and/or program) to be added without requiring additional
external logic to inhibit access to the lower 8K of that chip. Note that the PSEN and RD signals
are available on separate pins, so the program and data spaces outside the FX2 are not
combined as they are inside the FX2.
When code in the range 0x0000-0x1FFF is fetched from the on-chip RAM, the PSEN pin is not
asserted; when code is fetched from program memory in the range 0x2000-0xFFFF, the PSEN pin
is asserted.
It seems that although we can program 64K I2C E2prom by Console app, it said only 16K bytes can be loaded into internal low 16K byte by hardware bootloader , I like C0 or C2 mode, because it is very easy to debug or deliver code.
Does the C0 or C2 mode support more than 16K bytes code?
