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USB Low-Full-High Speed Peripherals

Anonymous
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 I just started designing for the FX2LP device (CY7C68014A) and I'm trying to implement something fairly similar to the GPIF-master FIFO example that was included with the DVK. The two modifications I want to make are 1) change the waveforms a bit and 2) include both single reads/writes as well as fifo reads/writes with different waveforms for each.

   

After reading through the ap note included with the design as well as a variety of ap notes on the website, one thing I still can't understand is how the waveforms drawn in the GPIF designer tool map into the flowstates[36] table. Specifically, I need to understand if/how I need to modify code such as the method below for setting up the write flowstates if I, say, delete a state from the original waveform. In addition, some of the comments in the "global flowstate register initializations" section are only adding to my confusion.

   

 

   

void Setup_FLOWSTATE_Write ( void )

   

   

   FLOWSTATE = FlowStates[27];  // 1000 0001b - FSE=1, FS[2:0]=001

   

   SYNCDELAY;

   

   FLOWEQ0CTL = FlowStates[29]; // CTL0 = 0 when flow condition equals zero (data flows)

   

   SYNCDELAY;

   

  FLOWEQ1CTL = FlowStates[30]; // CTL0 = 1 when flow condition equals one (data does not flow)

   

   SYNCDELAY;

   

}

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Anonymous
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 Please follow the thread in this link: http://www.cypress.com/?app=forum&id=167&rID=84383

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