CY7C65630 -

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imsuc_4029376
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In the document at table 3 there is a note [3] saying "Unused port DD+/DD– lines can be left floating. Leave the port power, amber, and green LED pins unconnected, and deassert the overcurrent pin. Do not leave the overcurrent pin floating; it is an input."

The OVR pin can have different polarity depending on the setting in EEPROM. Default is active low.

Question: Is there a difference in power consumption whether OVR active low and pulled up to VCC or OVR active high pulled to GND?

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SrinathS_16
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Hello,

CY7C65630 uses the CMOS technology. Hence, the static power consumption remains the same irrespective of active LOW or active HIGH OVR pin. The dynamic power consumption depends on the transients in switching the supply voltage and the capacitance. Hence, the dynamic power consumption will be lesser in the case of an active LOW circuit and slightly higher in case of an active HIGH circuit. But, in terms of the normal functioning of the device, the OVR pins are static and hence the power consumption will only be because of the leakage current (max +/- 10uA).

Best regards,

Srinath S

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SrinathS_16
Moderator
Moderator
Moderator
1000 replies posted 750 replies posted 500 replies posted

Hello,

CY7C65630 uses the CMOS technology. Hence, the static power consumption remains the same irrespective of active LOW or active HIGH OVR pin. The dynamic power consumption depends on the transients in switching the supply voltage and the capacitance. Hence, the dynamic power consumption will be lesser in the case of an active LOW circuit and slightly higher in case of an active HIGH circuit. But, in terms of the normal functioning of the device, the OVR pins are static and hence the power consumption will only be because of the leakage current (max +/- 10uA).

Best regards,

Srinath S

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