CY7C65215A 485 TXEN delay is too high and not a fixed value?

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MaMa_1595066
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i use a CY7C65215A for two serial port, one is RS485(TX enabled).

but I found that the TX enable signal has a large and not fixed delay after last bit send.  ~200 - 800us!! it's too large!

485_tx_delay.png

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1 Solution

Hello,

The time duration over which the EN pin is driven high is not fixed. It depends on the amount of data sent. The pin will not be driven for too long.

Please have a look at the attached screenshots below.

1. Transferring a  single character

pastedImage_0.png

2. Transferring a file:

pastedImage_2.png

If you are using the DVK, try the below pins which is tapped out directly from the SCBs.

pastedImage_4.png

Best Regards,

Yatheesh

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MaMa_1595066
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as a reference, the delay of TXEN signal on FT232 only ~5us, and very stable

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Hello,

Can you please let me know which pin number and name of the CY7C65215A part you are using as TXEN.

If you are using the TXLED pin mentioned in the datasheet, it is used only to indicate whenever a UART TX transaction is happening.

Best Regards,

Yatheesh

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i use GPIO_17

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Hello,

The time duration over which the EN pin is driven high is not fixed. It depends on the amount of data sent. The pin will not be driven for too long.

Please have a look at the attached screenshots below.

1. Transferring a  single character

pastedImage_0.png

2. Transferring a file:

pastedImage_2.png

If you are using the DVK, try the below pins which is tapped out directly from the SCBs.

pastedImage_4.png

Best Regards,

Yatheesh

MaMa_1595066
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hi, thanks for reply.

i use my own custom board.

what's the max and min  time duration after last bit send?

as i measured, it took from 200us up to ~1ms, it's too large for some application.

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Hello,

There is no time limit for the TXEN pin to be high.

But, more than 200us is not expected.

Please let me know your set up configuration and schematic so that we can try to reproduce the issue.

Best Regards,

Yatheesh

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MaMa_1595066
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hi,

following is our schematic and screenshot of config gui

DeepinScreenshot_select-area_20200108092439.png

DeepinScreenshot_select-area_20200108092625.png

DeepinScreenshot_select-area_20200108092603.png

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Hello,

Please check the box "VBUS Voltage is 3.3 V" in the USB Serial Configuration Utility under USB Tab as you are self powering the device with 3.3 V.

Refer to the attached image.

pastedImage_1.png

The connection in your schematic seems fine. Please check if the reset is pulled high at 3.3 V when the device is operating.

I could not reproduce the issue by configuring the device as per your previous response.

The EN pin stayed high for around 30 us when transmitting at a baud rate of 921600. Refer to the image below:

pastedImage_2.png

Best Regards,

Yatheesh

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Hi,

i check the box about "VBUS 3.3v" thing.

Yes! the first time the behavior of EN pin become acceptable!

But i found a strange characteristic, on my board, there is USB_RESET pin controlled by a mcu(in our system, when bus is ilde over some times, mcu will reset all usb device for HA).

If CY7C65215A  ben reset, the behavior of the EN is wrong(too long duration), But if I power cycle all board, the chip will be g00d.

Why? and how can i fix the problem?

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Hello,

Can you please let me know if you are using UART in CDC mode or in vendor mode?

Also, when resetting the device from an external controller make sure that the reset pin is held low for a minimum of 1us.

Thanks,

Yatheesh

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i think we use it as CDC mode, under linux, and use ttyACM0/1 directly.

our MCU reset the device for over 10ms

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Hello,

Just to clarify, the reset pin on USB-Serial is just like a hard reset when the pin is pulled low for more than 1us.

Can you please share the entire schematic of your application.

If the schematic is confidential you may send it through a personal message.

Best Regards,

Yatheesh.

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MaMa_1595066
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do you have a email? i cannot upload a  PDF file in forum, or pm

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Hello,

I have shared my comments on the schematic in mail. Please check.

Best Regards,

Yatheesh

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