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Hi,
We are wroing on a reference design using a PSoC 62 and a CY7C65215 as USB-UART bridge to debug. While usign the last one in bus powered mode we have noticed that if we connect the 5V USB to the CY7C65215 while there is no power on the PSoC 62 there is current flowing on the 3V3 supply of the PSoC (main supply of the PSoC). So basically the USB-UART bridge is pulling something up. Functionality is softwarewise is ok and debug messages work perfectly fine.
We have also noticed the opposite: if there is no 5V USB supply on the CY7C65215 side, then there is current flowing trough the 5V USB supply to ground when we connect 3V3 to the PSoC.
Is this the expecting behaviour of the CY7C65215 in bus powered mode? or do we need to configure anything else on the PSoC side? Configuration is ok per what we see on the serial configuration utility. Find attached some screen shots fo the schematics.
Thanks in advance
Ariel
Solved! Go to Solution.
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Hi,
There is a possibility of back powering through UART lines when different supplies are used for both chips of the interface.
You can restrict this current using following methods,
- Using a series resistor on the line (1k Ohms). This will limit the current flowing through the pins. Signal integrity must be tested if this solution is used.
- Using a diode(ref: 1N4148) and a pull up resistor(10K) pulled to VCCIO at the RXD pin of the USB-Serial Bridge Controller. this will avoid back powering of USB-Serial bridge. Same should also be implemented in the PSoC RX side to avoid current flow into PSoC.
Pranava
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Hi,
There is a possibility of back powering through UART lines when different supplies are used for both chips of the interface.
You can restrict this current using following methods,
- Using a series resistor on the line (1k Ohms). This will limit the current flowing through the pins. Signal integrity must be tested if this solution is used.
- Using a diode(ref: 1N4148) and a pull up resistor(10K) pulled to VCCIO at the RXD pin of the USB-Serial Bridge Controller. this will avoid back powering of USB-Serial bridge. Same should also be implemented in the PSoC RX side to avoid current flow into PSoC.
Pranava
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Hi Pranava,
would the same happen if we use the device in self powered mode? We might put a jumper on VDD of the CY7C65215 betwen 3V3 and its VDD and VBUS, so when we want to debug we just put the jumper in and when using the board without it we take it out to not have extra power consumption. As it is critical for this board.
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Hi,
Yes this would happen irrespective of the Power mode.
Back-powering is a common issue with UART interfaces working with different power supplies. Current flows through RXD pin into the chip (from your description its happening in both chips when its OFF) and must be prevented by implementing solutions described in my previous reply.
Pranava