Dear Sirs and Madams,
The item "Table 3. External Clock Input Requirements" is defined in AN72332, where "Rise time / fall time 3 [ns] (Max)" is specified.
Please tell us this voltage condition. (For example, 20% -80% VCC, not specified, etc.)
We have implemented a power switch architecture using the CYUSB3304, that is similar to figure 17 of the AN94150 App Note ("Designing a SuperSpeed Hub..."), without the recommended Q1 MOSFET.
In our design we have 4 USB ports and each port has its own USB power switch. The 4 power switches are enabled by a common PWR-EN signal from the CYUSB3304 and the over-current flags out of the power switches are tied together as a common flag back to the CYUSB3304. The 4 power switches receive 5V from a local 5V regulator. The power switches are set to trip at 500mA.
When we create an overcurrent condition, by putting a programmable load on the 5V pin on the USB port, the power switch asserts the OVRCURR pin on the CYUSB3304. In response, the CYUSB3304 switches off the power by de-asserting PWR_EN, which in turn makes the power switch de-assert OVRCURR.
Next, we assume that the CYUSB3304 should periodically check if the overcurrent condition is resolved, by re-asserting PWR_EN and monitoring OVRCURR.
HOWEVER we find that this re-try process takes a very long time and is indeterminate:
When the overcurrent condition is removed, the power enable pin takes a variable amount of time to return to the high state. This time was found to be anywhere between 2 seconds (2 to 5 seconds a few times) and 4.25 minutes (once). Most attempts took 10 to 30 seconds but quite a few were over 1 minute.
In practice, this means that the USB on our product will be disabled for 10-30 seconds after an overcurrent condition - up to 4 minutes.
Is this normal behaviour for the CYUSB3304? If not, what can we do to address this? We would also like a description of the over-current recovery process; the datasheet does not mention it.Show Less
The CY6611 USB Hub EVK is now available! Based on the EZ-USB™ HX3PD hub controller (CYUSB4347-BZXC), the CY6611 kit provides a powerful evaluation platform for customers who are interested in building USB docking stations or multi-functional monitors that provide 10 Gbps USB 3.2 Gen 2 ports with USB-C and Power Delivery features.
I have configured the HX3 CYUSB3314 - 88 pin through the HX3 Blaster plus SW, and set the EMBEEDED HUB BYTE to 1, because my USB Upstream link cannot be removed by a user ( Embeeded in a product). My Hub is powered externally ( VBUS is not used) .
However, when i cut the Vbus Upstream wire to simulate a default, or a perturbation, the Hub detect it and disconnect. Is it the appropriate and expected behaviour ? What is the purpose of this setting ?
I'm currently using the ihx3_revb_b7 firmware.
Thank you for your help,
I had another question regarding another post that I inquired about not long ago (link below):
For my application, I wanted to connect a USB Type-C receptacle to the CCG3PA for PD charging capability as well one of the downstream ports of the HX3 for USB 2.0/3.0 data. I originally wanted to retain legacy charging by connecting the Dp and Dm lines to both the CCG3PA as well as the HX3 since the CCG3PA has more charging profile capabilities. To reduce complexity, I decided to simply connect the Dp and Dm lines to the HX3 because BC1.2 and Apple Charging would suffice for the application. With this configuration, how would you recommend the downstream charging to be controlled considering that PD and legacy charging would be controlled by different devices?
Could I do any of the following:
Thanks in advance!
I'm made a custom usb hub for my wearable device project.
I modified the reference schematics for CY7C65632-28PIN, and one depth cam and one audio card is attached to the hub.
Unfortunately, I missed out the fact that the depth cam needs 120mA. so when it is attached to the hub, windows reports insufficient power supply.
Here is my schematic.
I've tried to disconnect FLGA, FLGB of external power switch(AIC1526-0), which is connected to OVR_#_, OVR_#_ ofCY7C65632 to avoid to notify overcurrent situation. but seem like it doesnt work. Windows still give a insufficient power supply warning message.
Is there any way to avoid this situation?
Also, I also tried to power the depth cam with external power supply, and still connect DM, DP to the hub. and it seems like the hub controller shut the port. so the depth cam is still not recognised.
Does the USB controller chip shut usb signals when the device doesnt request the power from the hub?
Dear Sirs and Madams,
Please tell us the details of "Requirements for XIN (External Clock Input)".
AN72332 --Guidelines on System Design using Cypress's USB 2.0 Hub (HX2VL), page 5 states:
Could you please provide us for the BW condition of this phase jitter?
For example, 12kHz to Nyquist frequency, etc.
Regarding this "External Clock Input Requirements",
Please let us know if there are detailed conditions such as masking by phase noise value.
We are using CYC67300 in our design for USB applications. As this part is obsoleted, please suggest a suitable alternate part in a higher temperature grade of -40 to >+110 degrees centigrade.Show Less
We are using a CY7C65620 under Linux. If we connect a device which draws to much current nothing gets reported in dmesg. If I connect the device to a different hub a "over-current condition" appears in dmesg.
With "lsusb -v" we can see the status of the ports under "Hub Descriptor: Hub Port Status". With over-current the status changes from "power" (0000.0100) to "C_OC" (0008.0000) on the CY7C65620. On the other hub lsusb shows a "oc" (0000.0008).
What can we do to get a correct over-curent reporting under Linux?Show Less
I'm working on a battery powered system with the following overall architecture...
The MCU is very competent one with two USB interfaces. The MCU manages power consumption of the entire system by turning off power to many of the system components.
The MCU and its LDO run continuously albeit in deep power down when the system is idle. The MCU enables and disables all of the high current regulators in the system to manage power. A timer in the MCU wakes up the system from a deep power down.
The downstream hub ports are all non-removable. The upstream port is connected to the host with a cable. Due to the (massive) amount of power required by the FPGA, the entire system will be "self powered" not "bus powered".
I have a number of questions:
1. Should the CY7C65642 be powered from +5V from the USB bus or from the switched +3.3V supply?
2. Many tears fall (without careful thought) when powered portions of a system drive sections that are not powered. Are there any concerns about a powered MCU driving the un-powered CY7C65642 through the USB signals? The USB_VBUS signal will be 0V on both MCU's USB ports when the CY7C65642 is powered off. Given that USB is inherently "hot swapped", I don't think this will be a problem. Preventing tears is always a good thing.
3. I want to use the CY7C65642in the 28 pin QFN package. I believe a EEPROM will be required to configure all of the down stream ports as "non removable". Does this matter? My understanding (from reading a post here) is that configuring a port as "non removable" is only required for strict USB compliance testing. This application does not need that. Any other to prefer using a EEPROM? (trying to space PCB area)
4. Can the MCU be used to configure the CY7C65642 via the I2C port in lieu of a EEPROM?
5. If a EEPROM is required to configure CY7C65642, can you recommend a USB tool that will program the EEPROM. I'm thinking TotalPhase's Aardvark might work.
Thanks for your help; it's much appreciated!