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USB Hosts Hubs Transceivers

New Contributor II

Hello

Does HX2VL have a pin to detect VBUS from HOST?  CY7C65632 does not have a pin to detect VBUS, so it is not clear what triggers the HUB to return D+ to the HOST and start communication. Is there a timing chart for Enumeration?

Best Regards

Arai

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Moderator
Moderator

Hello Arai-san,

1. Since in our reference designs, Reset pin is controlled by VBUS, the hub stays in reset mode till VBUS is enabled. After the delay specified by the RC circuit, the hub comes out of reset and puts up the terminations on D+/D- lines. Hence when we connect the Reset pin to another SOC, we need to check on the SOC side if VBUS is enabled and then put the hub out of reset mode.

2. Unfortunately, the timing chart similar to Figure 7-29 in the USB 2.0 isnt available currently. Please refer to the 'Power ON Reset' description in the datasheet for some details. I also checked internally that the total time taken for hub initialization to complete and respond to USB commands is around 70 ms after external reset de-assertion edge.

Best Regards,

Sananya

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Moderator
Moderator

Hello Arai-san,

No, HX2VL doesnt have a separate VBUS pin and hence we recommend connecting the Reset pin with a minimum delay of 10 ms to VBUS to ensure that the hub is in reset before connecting to the host and putting up terminations.

Best Regards,

Sananya

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New Contributor II

Hello Sananya san

They want to control the HX2VL RESET pin from an external SOC for enumeration.Is it ok?
Also, they do not understand the detailed flow, so in the above case, could you provide a timing chart for the RESET, D+, and VBUS pins until the enumeration is established?

Best Regards

Arai

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Moderator
Moderator

Hello Arai-san,

Yes, that is okay as long as the delay timing is met when asserting the signal from the SoC.

We currently dont have the timing waveform for Reset signal other than what is mentioned in the datasheet. If it is required by customer we can define it but it will take some time.

Best Regards,

Sananya

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New Contributor II

Hello Sanaya san

Thank you for you reply. I understood that the SOC can control the RESET pin of CY7C65632 for enumeration.

But, could you pleae more detailes base on the USB2.0 spec below.

HUB returns D+ within 100ms after detecting VBUS in "Figure 7-29. Power-on and Connection Events Timing" of USB2.0 spec, and the figure of communication start is described.

Regarding the above, I want to know if CY7C65632 is compliant, so I would like to know the following details.
Q1)  Since CY7C65632 does not have VBUS status pin( the other maker hub has the VBUS  status detect pin), please tell me the method to know the VBUS state in CY7C656532, and
I would like to know clearly how the CY7C65632 internally controls the above USB 2.0 spec within 100 ms even though CY7C65632 does not have VBUS status pin.


Q2)  In addition, tthe customer controls the RESET pin of CY7C65632 with SOC. also, please explain about the timing chart  same as "Figure 7-29. Power-on and Connection Events Timing" for CY7C65632. with VBUS, D+, RESET (SOC control), 3.3v(internal).

Best Regards

Arai

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Moderator
Moderator

Hello Arai-san,

1. Since in our reference designs, Reset pin is controlled by VBUS, the hub stays in reset mode till VBUS is enabled. After the delay specified by the RC circuit, the hub comes out of reset and puts up the terminations on D+/D- lines. Hence when we connect the Reset pin to another SOC, we need to check on the SOC side if VBUS is enabled and then put the hub out of reset mode.

2. Unfortunately, the timing chart similar to Figure 7-29 in the USB 2.0 isnt available currently. Please refer to the 'Power ON Reset' description in the datasheet for some details. I also checked internally that the total time taken for hub initialization to complete and respond to USB commands is around 70 ms after external reset de-assertion edge.

Best Regards,

Sananya

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