USB EZ-PD™ Type-C Forum Discussions
Hi I am trying to recreate these circuits but would like to be able to operate at 10Gbps. The CYPD3120-40 in the diagrams only supports 5gbps.
What other devices are capable of 10Gbps and Sink operation that would work in the diagrams instead?
Thanks
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I am able to successfully program the CCG3PA with OpenOCD using psoc4.cfg and MiniProg4 on a Linux system (Ubuntu 20.04).
However, the goal here is to create a factory programming and test jig for a CCG3PA-based product. It is not desired to embed a MiniProg4 inside of the the test jig. We would like to use a more cost effective SWD interface like the FTDI FT2232H.
I am able to successfully program a PSoC 4200M with OpenOCD using psoc4.cfg with a FTH2232H board configured for SWD.
However, I am not able to program the CCG3PA with that same configuration: OpenOCD using psoc4.cfg with FTH2232H board configured for SWD.
This thread is to hopefully gain any insights into why it does not work.
Do you know if KP3_REQUEST_ACQUIRE in Kitprog3/Miniprog4 firmware should work with CCG3PA?
I opened a GitHub issue to represent what I am attempting:
https://github.com/cypresssemi
I am trying to use MiniProg4 (KitProg3 FW version: 2.10.878) with CCG3PA (CYPD3171-24LQXQ). Currently, I can not get past the KP3_REQUEST_ACQUIRE USB request. Here is OpenOCD command that I am
using:
openocd -s ../scripts -f interface/kitprog3.cfg -f target/psoc4.cfg -c "kitprog3 power_config on 3300; kitprog3 acquire_config on 0 1 5; init; kitprog3 acquire_psoc; reset init; shutdown"
where "kitprog3 acquire_config on 0 1 5" means 0 for psoc4, 1 for power-cycle mode as CCG3GA lacks XRES pin and attempts is 5.
I modified src/flash/nor/psoc4.c to add CCG3PA family ID 0xB0 to psoc4_families[]. The MiniProg4 can connect to the DAP inside CCG3PA over SWD and read memory from the ROM table in the CCG3PA in
psoc4_get_family():
******************************
** Silicon: 0x2003, Family: 0xB0, Rev.: 0x12 (A1)
** Detected Family: CCG3PA USB Type-C Port Controller
** Detected Main Flash size, kb: 64
** Chip Protection: protection OPEN
******************************
Unfortunately, 'kitprog3 acquire_psoc' fails with error code -4. Here is the full log:
https://gist.github.com/pdp7/8
MiniProg4 seems to receive the KP3_REQUEST_ACQUIRE usb request OK but it fails to actually run KP3_REQUEST_ACQUIRE inside the MiniProg4 firmware successfully:
https://github.com/cypresssemi
I would very much appreciate any additional insights you could provide.
I would like to program firmware onto a CCG3PA CYPD3175-24LQXQ using the SWD lines and OpenOCD. However, I can not figure out the appropriate OpenOCD configuration file for the part. Is there anywhere to find that?
Show LessHi,
I'm trying to import .xlsx and .cvs files into the Protocol Analyzer.
It always says that the file has been imported successfully, but the "working bar" is running all the time and nothing shows up.
The file used has been exported to both xlsx and csv from the former anaylzer utility - neither works although this should be supported according to the release notes.
Any hints on that? What should be the correct format of the rows?
Thanks,
Domi
Show LessHello, using an old CY4500 on a new PC, 2020-11-03:
- Download and install CY4500 software from website, dated 2020-10-09
- Plug in CY4500
- Error, drivers not installed
- Read quick start, it says to look for drivers in the install directory
- No drivers are in install directory
- No old versions of CY4500 software are available on the website
Any idea how to make this work?
Thanks
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i want during runtime update User Parameters
PFET Gate Drivers on VBUS Path
CCG3PA has two integrated PFET gate drivers to drive external
PFETs on the VBUS provider and consumer path. The
VBUS_P_CTRL gate driver has an active pull-up, and thus can
drive high, low or High-Z.
Q: How to implement High-Z in FW ?
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Hello, I noticed that support has been added for CCG6DF to src/flash/nor/psoc4.c:
commit 1ec8dc3fb0cd5b5fc1d71470b211a1a05efc70b9
Author: Volodymyr Medvid <vmed@cypress.com>
Date: Mon Aug 31 14:42:43 2020 +0300
Add Cypress modifications for OpenOCD 4.1
diff --git a/src/flash/nor/psoc4.c b/src/flash/nor/psoc4.c
index 48913f1d3e52..405d452cdd32 100644
--- a/src/flash/nor/psoc4.c
+++ b/src/flash/nor/psoc4.c
@@ -254,6 +254,8 @@ const struct psoc4_chip_family psoc4_families[] = {
{ 0xB5, "PSoC 4100S Plus", .flags = 0, .spcif_ver = spcif_v3 },
{ 0xB8, "PSoC 4100S Plus/PSoC 4500", .flags = 0, .spcif_ver = spcif_v3 },
{ 0xBE, "PSoC 4100S Max", .flags = 0, .spcif_ver = spcif_v3 },
+ { 0xC0, "CCG6DF USB Type-C Port Controller", .flags = 0, .spcif_ver = spcif_v3 },
+ { 0xC3, "CCG6SF USB Type-C Port Controller", .flags = 0, .spcif_ver = spcif_v3 },
{ 0, "Unknown", .flags = 0, .spcif_ver = spcif_unknown }
};
I would like to program a CCG3PA part (CYPD3171-24LQXQ) using OpenOCD. I have the MiniProg3, MiniProg4 and J-Link which I could use for the task. I read the "CCGx (CYPDxxxx) Programming Specifications" PDF, and I am hoping that the support for CCG6DF might be able to be extended to support CCG3PA.
Thank you!
Drew
Hello,
We are developing a USB-A and USB-C charger around the CYPD3175. The charger will be located in area where the ambient temperature as the potential to be high by moment. In order to help the internal power electronics to stay within a limited temperature, we are planning to control the charging current available. Our USB charger only supplies 5V on USB-A and C with a limitation of 30W total.
We can control the PD contract at runtime to reduce the current drawn from the charging device on USB-C, but it looks like for none-PD devices, the only way to reduce the current without interrupting the USB port power is to disable high current charging modes such as Apple 2.4A, QC, AFC and keep the BC1.2 active to limit at 1.5A. Is my observation is right?
Then how can we change charge mode during runtime?
Thanks,
Patrick
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