USB EZ-PD™ Type-C Forum Discussions

Is a diode required for feeding the VDDD pin from a 5V LDO? There are a few configurations shown in the documentation. The ones where VDDD is externally sourced appear to have Diodes. The CYPD3171 dev kit has a 30V 5A diode. I am hoping that is overkill or, is there something structural in the part that can back feed the VBUS to the VDDD pin? I can’t imagine I would ever need a 5A (Huge package size) diode to feed VDDD so I am looking for some confirmation here.

Greg

Hi, 

On our project we need to enable BB retimer TX compliance test mode for certification, and Intel guidance is that this is done through the PD controller. It looks like there is an undocumented interface to communicate with the retimer in the user defined register space. How do we enable this functionality? 

This is using the host sdk CYPD5225-96BZXI_notebook_tbt project for tiger lake. 

Are CCG devices pre-programmed at factory with power profiles to negotiate Power Delivery contracts in either UFP or DFP roles?

Are the factory delivered profiles defined in the Datasheet or an Application Note?

I'm specifically interested in a CCG3PA factory set to DRP = CYPD3171-24LQXQ.

I would like to know in general how to determine how any CCG device set for any role will start up on a new product.

I'm guessing each device starts with either no Power Profile or a 5V, 1A  profile to accept the default power configuration. I'm sure this is clearly documented somewhere I've neglected to look.

Greg

Will the CYPD3177 communicate on a 1.8V I2C bus?  The datasheet does not specify a voltage range for the HPI, and neither does the HPI specification document.  Reference designs show 3.3V I2C bus.

I have a UFP (sink) design that uses the CCG6 (CYPD6125) that connects to a LCD and to a HX3 (USB 2&3) hub. I need to configure the CCG6 to connect in type-c DisplayPort alt mode. When trying to enter the DisplayPort alt mode the board sends a "Responder NAK".

Planning to use CCG3PA for a power-sink (consumer role) only.
The board has no other power-sources nor batteries at the time of an type-c ac/dc being plugged in.

1.)
Can't find anything in the official CCG3PA datasheet that states what VBUS_P_CTRL's default state is.
Since the regulator for the CCG's VDDD rail will be post the 'consumer fet', it would be great with some input if this cold-booting ("dead battery") state is supported. 

2.)
Let's assume we would have a local power-source, so that VDDD would already be powered with a 3.3V rail.
Are there more details available on how to handle the fact that VDDD is also an output/regulator coming from the CCG3PA once it sees VBUS. I can see a diode in the block-level schematic in the datasheet but some more details would be great.

Thanks 

I have a UFP (sink) design that uses the CCG6 (CYPD6125) that connects to a LCD and to a HX3 (USB 2&3) hub. I need to configure the CCG6 to connect in type-c DisplayPort alt mode. This should be pin assignment D (2 lane DisplayPort and 2 for USB superspeed). I have the board getting PD power just find but the PD contract stalls before it can enter into the DisplayPort alt mode. I'm pretty sure I don't have the config correct.

For testing I'm connected to the CCG3 development board.

Wanted to use CCG5, 6 or 7 series, but seems almost all CCG-series are 0 stock globally.

Can Infineon please let us know what parts will be stocked again soon.

thanks david