Is it safe to solder the USB D+/D- into TP9/12 on the CY4532 EVK ?

[SeKw_4837866]

Hello,

I am trying to prove a design concept on the CY4532 EVK. The custom board will provide the PD power and pass USB D+/D- signals into USB C.

Looking at the CY4523 schematics and layout on the PCB, the D+/D- are tied to the P3_0 and P3_1 of the CYPD3171-24LQXQ. The two through hole TP pins are exposed on the PCB but not loaded.

Is it safe to solder the USB D+/D1 into TP9 and TP12 on the board ? If it causes a damage, is there a way to hook them up to USB C receptible on the PCB ? At this moments, the USB speed is not critical.

On the PD protocol analyzer - CY4500,  the USB communication cap is set to '0' as follows.  Is it possible to set to '1' from EZ-PD configuration utility ?

Thank you for the help in advance.

SK

[SeKw_4837866]

Sorry that the attached image is not shown.

SK

[MallikaK_22 · Accepted solution]

Hi,

TP9 and TP12 are test points.

If BC 1.2 support is needed, DP/DM lines of CCG3PA should be connected to Type-C receptacle. The test points can be soldered.

The only significant point to note is that the trace length of Dp/Dm net should be as short as possible.

Regards,

Mallika

[SeKw_4837866]

Hello Mallika,

Thank you for the confirmation. If my understanding is correct, I am able to hook up the USB D+/D- pins from a external device - e.g. PC USB type A without damaging the CYPD3171 on the C4532 EVK.

Thanks,

Seungsik Kwak

[SeKw_4837866]

Hello Mallika,

As per your suggestion, I soldered USB D+ and D- pins to TP9 and TP12 respectively. The USB cable is as short as 20cm long. 

However, the host PC which has a USB A connector to TP9 and TP12 doesn't recognize the USB devices which is connected to USB C.  The voltage D+/D- are 670mV, not 3.3V.

So, I wonder if the P3_0 and P3_1 pin in the CY3171 causes the issue.  I am looking for the disabling GPIO P3_0 and P3_1 from the firmware. Please guide me how to disable the pins in the SDK.

Happy holiday and New Years.

SK

[MallikaK_22]

Hi,

Please share a few details of your project.

>> Do you wish to implement legacy charging in your design for which you are using D+/D-?

>> Which firmware are you using?

Please refer to the CCGX Power SDK User Guide https://www.cypress.com/documentation/software-and-drivers/ez-pd-ccgx-power-software-development-kit for details on how to customize the project. It can be customized using PSoC Creator.

Please refer to the KBA (HARDWARE-Question 2) https://community.cypress.com/docs/DOC-21660 ​ on how to use DP/DM lines.

Also, in response to your previous question, the USB Communication Capable bit in CCG3PA can be set to 1 using EZ-PD Configuration Utility.

Best Regards,

Mallika